• 한국위성정보통신학회논문지
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• 제11권3호
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• pp.65-71
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• 2016

현재 한국항공우주연구원에서 개발 중인 차세대 저궤도 위성의 탑재컴퓨터는 높은 성능을 위해 LEON2-FT/AT697F 프로세서를 사용하며 SpaceWire, 1553B, DMAUART, CAN Master 등의 다양한 통신을 지원하기 위해 별도의 FPGA 기반의 통신칩이 개발되었다. 프로세서와 통신칩간의 통신은 PCI 버스를 통해서 이루어지며, 탑재소프트웨어에서 직접 PCI 버스를 통해 각종 디바이스를 제어 및 통신을 수행한다. 차세대 탑재컴퓨터에서는 기존 1553B 통신을 위해 사용되었던 VASI IP1553B 컨트롤러 대신 Actel 1553BRM 코어를 사용하며 통신칩의 AMBA 버스상에 연결을 위해 Aeroflex Gaisler에서 개발 된 B1553BRM Wrapper를 사용한다. 본 논문에서는 차세대 저궤도 위성에서의 PCI기반의 1553B 통신 소프트웨어의 구조와 통신방법에 대해서 기술하고 탑재소프트웨어 레벨의 태스크를 통한 1553B 처리방식에 대해서 설명한다. 그리고 시뮬레이터 및 실제 하드웨어에서 테스트 된 결과에 대해 설명한다.

• 콘크리트학회논문집
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• 제14권4호
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• pp.492-502
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• 2002

게르버보의 댑단부는 PCI와 CPCI 배근방법에 의하여 설계하였고, 남은 두 단부는 본 연구에서 고려한 배근방법으로 배근하였다. 본 실험에서 고려한 댑단부의 깊이는 프리캐스트 콘크리트의 깊이 77 cm와 토핑콘크리트의 깊이 18.2 cm를 합한 전체 보깊이의 1/2에 해당한다. 실물크기 게르버 U형보 2개에 대하여 4회의 전단실험을 수행하였다. PCI와 CPCI 설계방법에 의한 모든 시험체는 사용하중의 32 % 이전에 댑 모서리 요각부위에서 초기균열이 발생하였으며, 예상 공칭강도에는 못 미치나 설계강도를 상회하여 종국 파괴되었다. 걸이 철근량을 PCI 요구량보다 증가시킬수록 초기균열 제어에 효과적이었으며, 폭 넓은 균열을 발생시키며 연성적으로 파괴되었고 강도도 증가하였다. CPCI 설계방법에 의한 시험체는 PCI시험체에 비하여 보다 연성적으로 파괴되었다.

• Journal of the Korean Data and Information Science Society
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• 제13권2호
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• pp.285-294
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• 2002

The control chart is widely used tool for monitoring of the process. This paper deals with an interpretation of the process capability index(PCI) and process performance index(PPI) when the control chart is used for monitoring of the process. The main difference between the PCI and PPI is how we did estimate the process deviation. The PCI uses the within process variation and the PPI uses the total process variation, which is conceptually defined as sum of between process variation and within process variation. Easy interpretations of the PCI and PPI for field engineers are described. And some new approaches to interpretation of the process capability and performance index may be useful in early stabilization of new process.

• 대한물리치료과학회지
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• 제7권1호
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• pp.285-294
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• 2000

80 persons who don't have past history of cardiopulmonary and neuromuscular disease. The results were as follow; 1. PCI(Physiological Cost Index) value without loading to ankle were significantly increased compared to 1kg, and 2kg (p<0.01). 2. Female Subjects showed more increased PCI value in without loading and lkg, 2kg loading compared to male subjects (p<0.01). 3. In every PCI condition the difference among height groups was observed (p<0.01). 4. The difference among weight groups in each PCI condition was observed (p<0.01). These results showed that energy consumption was increased according to loading on the ankle during gait so weight of orthosis or prosthesis must be considered when choosing them and during gait training with these ones.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2016년도 추계학술발표대회
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• pp.58-61
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• 2016

.PCI Express는 고속, 저전력 등의 특성으로 업계 표준으로서 많이 쓰이고 있는 프로세서와 주변 I/O 장치들을 연결하는 버스 기술이다. 또한, PCI Express는 인피니밴드와 이더넷과 더불어 고성능 컴퓨터나 컴퓨터 클러스터를 위한 시스템 인터커넥트 기술로 널리 쓰이고 있다. PGAS(partitioned global address space) 프로그래밍 모델은 컴퓨터 클러스터와 같은 다중 호스트 시스템에서 단측 RDMA(remote direct memory access)를 구현하는데 많이 이용된다. 본 논문에서는 PCI Express 기반 RDMA를 구현하기 위해 PGAS 프로그래밍 모델인 OpenSHMEM의 기존의 특징을 유지하여 PCI Express 기반 OpenSHMEM API를 설계 및 구현하였다. 구현한 OpenSHMEM API는 PCI Express의 NTB(non-transparent bridge) 기술로 2대의 PC를 연결한 시스템에서 매트릭스 곱셈 예제를 통하여 실험하였다.

• 품질경영학회지
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• 제28권2호
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• pp.103-122
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• 2000

Process capability indices (PCI) $C_p\;C_{pk},\;C_m,\;and\;C_{pmk}$ are widely used to evaluate the process performance. The PCI's have been evolved to consider the 'off targetness' more adequately. However, all of these indices are found to be inconsistent with the proportion of nonconforming items, in some cases. That is, the PCI for a process may result in higher value even when the proportion of defectives increases. For these reasons, we propose a new capability index, $c_{pd}$, which is consistent with the defect rate. The characteristics of the new PCI, $c_{pd}$ are investigated with respect to the existing PCI's. Some statistical properties of an estimator for $c_{pd}$ are also investigated by a Monte Carlo simulation. Sensitivity study under minor deviation from normality is also performed to show the robustness of $c_{pd}$. A good estimator for $c_{pd}$ is under study.

• 한국시뮬레이션학회논문지
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• 제12권4호
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• pp.95-102
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• 2003

Stream servers are for supplying multimedia stream data to users through the internet such as movies and music without discontinuation. A typical stream server is designed roughly by considering the characteristics of stream services and by employing processors, memory, PCI bus, Ethernet, TOE and disks. This study focuses on deciding the priority for using resources such as PCI bus, buffer memory and TOE buffer, which have limited capacities in a typical stream server. When the priorities for using limited resources are not given properly, the stream servers may not even function as originally designed. The simulation study shows that the top priority for using PCI bus for normal streaming services should be given to the operation that sends data from buffer memory to TOE buffer. Giving priority for using PCI bus to other operation such as sending data from disks to memory results in a deadlock phenomenon.

• 한국시뮬레이션학회:학술대회논문집
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• 한국시뮬레이션학회 2001년도 춘계 학술대회 논문집
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• pp.77-81
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• 2001

In this paper, a RAID system is modeled and simulated by using the DEVS formalism. The RA[D system interacts with a host system by using the high-speed Fibre channel protocol and stores input data in an array of IDE disks. The DEVS formalism specifies discrete event systems in a hierarchical, modular manner. The RAID system model is composed of three units: primary-PCI unit, secondary-PCI unit and CPU unit. The primary-PCI unit interfaces with the host system and caches I/O data. The secondary-PCI unit includes disks. The CPU unit controls overall system. The control algorithm of CPU and PCI transactions are analyzed and modeled. From an analysis of simulation events, we can conclude that the proposed model satisfies given requirements.

• 한국시뮬레이션학회논문지
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• 제11권1호
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• pp.11-22
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• 2002

In this paper, a RAID system is modeled and simulated by using the DEVS formalism. The RAID system interacts with a host system by using the high-speed Fibre channel protocol and stores data in an array of IDE disks. The DAVS formalism specifies discrete event systems in a hierarchical, modular manner. The RAID system model is composed of three units: primary-PCI unit, secondary-PCI unit and MCU unit. The primary-PCI unit interfaces with the host system and I/O data caches. The secondary-PCI unit includes disks. The MCU unit controls overall system. The control algorithm of MCU and PCI transactions are analyzed and modeled, From the analysis of simulation events, we can conclude that the proposed model satisfies given requirements.

• 한국시뮬레이션학회:학술대회논문집
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• 한국시뮬레이션학회 2003년도 추계학술대회 및 정기총회
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• pp.67-74
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• 2003

Stream servers are for supplying multimedia stream data to users through the internet such as movies and musics without discontinuation. A typical stream server is designed roughly by considering the characteristics of stream services and by employing processors, memory, PCI bus, Ethernet, TOE and disks. This study focuses on deciding the priority for using resources such as PCI bus, buffer memory and TOE buffer, which have limited capacities in a typical stream server. The simulation study shows that the top priority for using PCI bus for normal streaming services should be given to the operation that sends data from buffer memory to TOE buffer Giving priority for using PCI bus to other operation such as sending data from disks to memory results in deadlock Phenomenon.