• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.285-289
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• 2015

We prepared silver Schottky contacts to O-polar and nonpolar m-plane bulk ZnO wafers. Then, by considering various transport models, we performed a comparative analysis of the current transport properties of Ag/bulk ZnO Schottky diodes, which were measured at 300, 200, and 100 K. The fitting of the forward bias current-voltage (I-V) characteristics revealed that the tunneling current is dominant as the transport component in both the samples. Compared to thermionic emission (TE), a stronger contribution of tunneling current was observed at low temperature. The reverse bias I-V characteristics were well fitted with the thermionic field emission (TFE) in both the samples. The presence of acceptor-like adsorbates, such as O₂ and H₂O, modulated the surface conductive state of ZnO, thereby affecting the tunneling effect. The degree of activation/passivation of acceptor-like adsorbates might be different in both the samples owing to their different surface morphologies and surface defects (e.g., oxygen vacancies).

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1170-1173
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• 2006

Active layer patterned OTFT was obtained on a plastic substrate using the optimal growth condition of pentancene thin films as active layer and parylene thin films as passivation layer. Tranditional photolithography was performed to use a dry etch to pattern the material stack. The pentacene thin film and parylene thin film were deposited onto a plastic substrate using PC-OVD and CVD, respectively.

• Electrical & Electronic Materials
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• v.8 no.3
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• pp.352-356
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• 1995

Native oxide layer on MCT (HgCdTe) has been grown uniformly in H$\_$2/O$\_$2/ electrolyte through anodic oxidation method. It has been determined that anodic oxidation of HgCdTe in H$\_$2/O$\_$2/ electrolyte proceeds immediately with the input of constant currents without any induction time required for anodic oxideation in KOH electrolyte. Oxide layer with the resistivity of 2*10$\^$10/.ohm.cm and the refractive index of 2.1 suggested the possibility of well matching combination layer with ZnS for MCT MIS device. XPS results indicated that the major components of oxide layer grown in H202 solution is TeO$\_$2/ with the possibility of small amounts of CdTeO$\_$3/.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.33 no.4
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• pp.425-429
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• 2009

The protection for copper tarnish was developed by surface treatment method and volatile corrosion inhibiting (VCI) technology. The performance of surface treatment and VCI material is also examined in simulated test environment. Benzotriazole (BTAH) solution that contained molybdate showed best performance than others. Usage of VCI materials with surface treatment was more effective. The protection film foamed on the surface of copper was investigated by auger electron spectroscopy (AES) and X-ray photoelectron spectroscopy (XPS). Molybdate does not participate in the formation of the protective film but promotes the passivation effect. This facilitates the stabilization of the cuprous oxide film, and strengthens the adsorption of BTAH.

• Journal of Integrative Natural Science
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• v.1 no.3
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• pp.250-253
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• 2008

New issues arise as to surface characterization, quantification and interface formation. Surface and interface control of CdSe nanocrystal systems, one of the most studied and useful nanostructures. Semiconductor quantum dots (QDs) have been the subject of much interest for both fundamental reseach and technical applications in recent years, due mainly to their strong size dependent properties and excellent chemical processibility. In this dissertation, the synthesis of CdSe quantum dots were synthesized by pyrolysis of high-temperature organometallic reagents. In order to modify the size and quality of quantum dots, we controlled the growth temperature and the relative amount of precursors to be injected into the coordinating solvent. Moreover, an effective surface passivation of monodisperse nanocrystals was achieved by overcoating them with a higher-band-gap material. Synthesized CdSe quantum dots were studied to evaluate the optical, electronic and structural properties using UV-absorption, and photoluminescence measurement.

• Journal of Korean Vacuum Science & Technology
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• v.3 no.1
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• pp.24-29
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• 1999

The characteristic behaviors of CH3Br were examined first for the dry etching of polysilicon in a Cl2/CH3Br/O2 plasma. CH3Br is revealed one of the excellent additive gases to control anisotropy of etching profile and to give no undercutting for various typed of polysilicons. CH3Br acts as a passivation precursor on the side wall in etch cavity by forming polymer-like films such as CHxBry(x+y=1,2). The decrease of etch selectivity due to the reaction if the C-containing species from CH3Br with the surface O atoms of SiO2 was overcome by the addition of O2 into plasma, resulting that the selectivity increased by 2~3 times. According to the results of optical emission signals, CH3Br should be dissociated into several fragments to give more hydrogen atoms than bromine atoms in our helical resonator system.

• Korean Journal of Materials Research
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• v.3 no.5
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• pp.482-496
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• 1993

Radiation damage and contamination of silicons etched in the $CF_4+H_2$ and $CHF_3$ magnetron discharges have been characterized using Schottky diode characteristics, TEM, AES, and SIMS as a function of applied magnetic field strength. It turned out that, as the magnetic field strength increased, the radiation damage measured by cross sectional TEM and by leakage current of Schottky diodes decreased colse to that of wet dtched samples especially for $CF_4$ plasma etched samples, For $CF_4+H_2$and $CHF_3$ etched samples, hydrogen from the plasmas introduced extended defects to the silicon and this caused increased leakage current to the samples etched at low magnetic field strength conditions by hydrogen passivation. The thickness of polymer with the increasing magnetic field strength and showed the minimum polymer residue thickness near the 100Gauss where the silicon etch rate was maximum. Also, other contaminants such as target material were found to be minimum on the etched silicon surface near the highest etch rate condition.

• Journal of the Korean Society of Industry Convergence
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• v.7 no.3
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• pp.259-263
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• 2004

In the manufacture progress of LCD or semiconductor, there are used many kinds of gas like erosion gas, dilution gas, toxic gas as a progress which used these gas there are required high puritize to increase accumulation rate of semiconductor or LCD materials work progress of semiconductor or LCD it demand many things like the material which could minimize metallic dust that could be occured by reaction between gas and transfer pipe laying material, illumination of the surface, emition of the gas, metal liquation, welding etc also demand quality geting stricted. Material-Low-sulfur-contend (0.007-0010), vacuum-arc-remelt(VAR), seamless, high-purity tubing material is recommend for enhance welding lower surface defect density All wetted stainless steel surface must be 316LSS elecrto polishinged with ${\leq}0.254{\mu}m$($10.0{\mu}in$) Ra average surface finish, $Cr/Fe{\geq}1.1$ and $Cr_2O_3$ thickness ${\geq}25{\AA}$ From the AES analytical the oxide layer thickness (23.5~36 angstroms silicon dioxide equivalent) and chromum to iron ratios is similar to those generally found on electropolished stainless steel., molybdenum and silicon contaminants ; elements characteristic of stainless steel (iron, nickel and chromium); and oxygen were found on the surface Phosphorus and nitrogen are common contaminants from the electropolish and passivation steps.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.431-432
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• 2012

In the era of 20 nm scaled semiconductor volume manufacturing, Microelectronics Manufacturing Engineering Education is presented in this paper. The purpose of microelectronic engineering education is to educate engineers to work in the semiconductor industry; it is therefore should be considered even before than technology development. Three Microelectronics Manufacturing Engineering related courses are introduced, and how undergraduate students acquired hands-on experience on Microelectronics fabrication and manufacturing. Conventionally employed wire bonding was recognized as not only an additional parasitic source in high-frequency mobile applications due to the increased inductance caused from the wiring loop, but also a huddle for minimizing IC packaging footprint. To alleviate the concerns, chip bumping technologies such as flip chip bumping and pillar bumping have been suggested as promising chip assembly methods to provide high-density interconnects and lower signal propagation delay [1,2]. Aluminum as metal interconnecting material over the decades in integrated circuits (ICs) manufacturing has been rapidly replaced with copper in majority IC products. A single copper metal layer with various test patterns of lines and vias and $400{\mu}m$ by $400{\mu}m$ interconnected pads are formed. Mask M1 allows metal interconnection patterns on 4" wafers with AZ1512 positive tone photoresist, and Cu/TiN/Ti layers are wet etched in two steps. We employed WPR, a thick patternable negative photoresist, manufactured by JSR Corp., which is specifically developed as dielectric material for multi- chip packaging (MCP) and package-on-package (PoP). Spin-coating at 1,000 rpm, i-line UV exposure, and 1 hour curing at $110^{\circ}C$ allows about $25{\mu}m$ thick passivation layer before performing wafer level soldering. Conventional Si3N4 passivation between Cu and WPR layer using plasma CVD can be an optional. To practice the board level flip chip assembly, individual students draw their own fan-outs of 40 rectangle pads using Eagle CAD, a free PCB artwork EDA. Individuals then transfer the test circuitry on a blank CCFL board followed by Cu etching and solder mask processes. Negative dry film resist (DFR), Accimage$^{(R)}$, manufactured by Kolon Industries, Inc., was used for solder resist for ball grid array (BGA). We demonstrated how Microelectronics Manufacturing Engineering education has been performed by presenting brief intermediate by-product from undergraduate and graduate students. Microelectronics Manufacturing Engineering, once again, is to educating engineers to actively work in the area of semiconductor manufacturing. Through one semester senior level hands-on laboratory course, participating students will have clearer understanding on microelectronics manufacturing and realized the importance of manufacturing yield in practice.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.1
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• pp.73-79
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• 2013

Crystalline silicon solar cells with $SiN_x/SiN_x$ and $SiN_x/SiO_x$ double layer anti-reflection coatings(ARC) were studied in this paper. Optimizing passivation effect and optical properties of $SiN_x$ and $SiO_x$ layer deposited by PECVD was performed prior to double layer application. When the refractive index (n) of silicon nitride was varied in range of 1.9~2.3, silicon wafer deposited with silicon nitride layer of 80 nm thickness and n= 2.2 showed the effective lifetime of $1,370{\mu}m$. Silicon nitride with n= 1.9 had the smallest extinction coefficient among these conditions. Silicon oxide layer with 110 nm thickness and n= 1.46 showed the extinction coefficient spectrum near to zero in the 300~1,100 nm region, similar to silicon nitride with n= 1.9. Thus silicon nitride with n= 1.9 and silicon oxide with n= 1.46 would be proper as the upper ARC layer with low extinction coefficient, and silicon nitride with n=2.2 as the lower layer with good passivation effect. As a result, the double layer AR coated silicon wafer showed lower surface reflection and so more light absorption, compared with $SiN_x$ single layer. With the completed solar cell with $SiN_x/SiN_x$ of n= 2.2/1.9 and $SiN_x/SiO_x$ of n= 2.2/1.46, the electrical characteristics was improved as ${\Delta}V_{oc}$= 3.7 mV, ${\Delta}_{sc}=0.11mA/cm^2$ and ${\Delta}V_{oc}$=5.2 mV, ${\Delta}J_{sc}=0.23mA/cm^2$, respectively. It led to the efficiency improvement as 0.1% and 0.23%.