• 한국정보처리학회논문지
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• 제7권6호
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• pp.1932-1940
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• 2000

We must solve problems caused by mobile computing environments for supporting efficient mobile computing services. The problem is the use of wireless medium having high error rates and low bandwidth, and the sudden network disconnection to reduce the power consumption of a mobile host and the cost of the network connection. For these problems, we proposed the architecture of the partial connection manager and designed and implemented that in this paper. In particular, The partial connection manager creates the limited number of mobile agents according to priority and sends them in parallel to server systems and combines results of them process rapidly the user request. By applying the proposed partial connection manager to the mobile computing services called cybermarket, we knew that the mobile agent technique could be suited to the mobile computing environment and overcome the partial connection problem caused by eh mobile computing environment.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 추계학술대회 논문집 학회본부A
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• pp.137-140
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• 1998

A new SPWM inverter using three-phase boost converter by auxiliary partial resonant with high power factor and high efficiency is proposed. The proposed boost converter is constructed by using a resonant network in parallel with the switch of the conventional boost converter. The devices are switched at zero voltage or zero current eliminating the switching loss. A new Partial resonant boost converter achieves zero-voltage switching (ZVS) or zero-current switching (ZCS) for all switch devices without increasing their voltage and current stresses. This paper introduces elimination of low-order harmonics compared with conventional SPWM inverter and SPWM inverter using three-phase boost converter by auxiliary Partial resonant.

• 전자공학회논문지C
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• 제34C권2호
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• pp.29-37
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• 1997

A new algorithm and parallel architecture for high-speed complex number multiplication is presented, and a prototype chip based on the proposed approach is designed. By employing redundant binary (RB) arithmetic, an N-bit complex number multiplication is simplified to two RB multiplications (i.e., an addition of N RB partial products), which are responsible for real and imaginary parts, respectively. Also, and efficient RB encoding scheme proposed in this paper enables to generate RB partial products without additional hardware and delay overheads compared with binary partial product generation. The proposed approach leads to a highly parallel architecture with regularity and modularity. As a results, it results in much simpler realization and higher performance than the classical method based on real multipliers and adders. As a test vehicle, a prototype 8-b complex number multiplier core has been fabricated using $0.8\mu\textrm{m}$ CMOS technology. It contains 11,500 transistors on the area of about $1.05 \times 1.34 textrm{mm}^2$. The functional and speed test results show that it can safely operate with 200 MHz clock at $V_{DD}=2.5 V$, and consumes about 90mW.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1081-1084
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• 1995

Internal voids located within an insulation will arise partial discharge that causes local breakdown and even the entire insulation breakdown. For HV apparatuses, it is usual case that several voids are formed within non-uniform electric field condition rather than single void within uniform field, which can be solved analitically. The purpose of this work is to study partial discharge and breakdown characteristics of an insulation according to the distribution pattern of two disc-type voids that are located within non-uniform field. The results from numerical field analysis and experiments show that the electric field within the voids decreases as they are arranged more serially, which accordingly results in the increase of partial discharge inception field(PDIF) much higher than that of single void model. With parallel arranged voids, PDIF is almost the same as that of single void model. On the other hand, AC breakdown strength decreases as voids are arranged more serially, which is a natural result considering the reduction of effective insulation thickness. For parallel voids, this effect cannot he noticed where as they show different pattern compared with single void and serial void models in $\Phi$-Q-N analysis. Considering these results may leads us to the conclusion that, in the evaluation of insulating products through PD test, it is not sufficient to determine only PDIV or existence of PD at predetermined voltage level. We could evaluate more accurately by considering all the available data such as PDIV, PD magnitude, PD occurring phase, number of PD pulses, and etc.

• 한국통신학회논문지
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• 제35권11C호
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• pp.901-906
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• 2010

겔러거와 맥케이에 의해 처음 소개된 LDPC(Low density parity check)부호는 성능의 우수함 및 간단한 복호과정으로 많은 관심을 받아 왔으며, 특히 DVB-Satellite 2, DVB-Cable 2, DVB-Terrestrial 2 등의 차세대 방송시스템에서 널리 사용되고 있다. LDPC 부호의 성능은 충분히 긴 길이의 부호어와 iterative decoder를 사용함으로서 샤논의 한계에 거의 근접하는 성능을 보여준다. 그러나, LDPC 부호는 현재 이동통신에서 널리 사용되고 있는 Turbo 부호와 비교해서 복잡한 부호화 과정이 단점으로 지적되고 있다. 본 논문에서는 IRA 부호기를 사용하여 DVB-S2 LDPC 부호기의 성능을 향상 시킬 수 있는 방안을 제안한다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제8권8호
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• pp.2691-2707
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• 2014

Medium access control is critical in wireless networks for efficient spectrum utilization. In this paper, we introduce a novel collision resolution method based on the technique of known interference cancellation, and propose a new MAC protocol named as CR-MAC, in which AP tries to decode all the collided data packets by combining partial retransmissions and known interference cancellation. As the collided transmissions are fully utilized, less retransmission is required, especially in a crowded network. The NS-2simulation and MATLAB numerical results show that, under various network settings, CR-MAC performs much better than the IEEE 802.11 DCF in terms of the aggregation throughput and the expected packet delay.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• 제13권1호
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• pp.13-20
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• 2009

The IPSAP which is a finite element analysis program has been developed for high parallel performance computing. This program consists of various analysis modules - stress, vibration and thermal analysis module, etc. The M orthogonal block Lanczos algorithm with shiftinvert transformation is used for solving eigenvalue problems in the vibration module. And the multifrontal algorithm which is one of the most efficient direct linear equation solvers is applied to factorization and triangular system solving phases in this block Lanczos iteration routine. In this study, the performance enhancement procedures of the IPSAP are composed of the following stages: 1) communication volume minimization of the factorization phase by modifying parallel matrix subroutines. 2) idling time minimization in triangular system solving phase by partial inverse of the frontal matrix and the LCM (least common multiple) concept.

• Journal of Communications and Networks
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• 제1권2호
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• pp.118-133
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• 1999

In this paper we compare linear and non-linear inter-ference cancellation for systems employing code division multi-ple access (CDMA) techniques. Specifically, we examine linear and non-linear parallel interference cancellation(also called multi-stage cancellation) in relationship to other multiuser detection al-gorithms. We show the explicit relationship between parallel inter-ference cancellation and the decorrelator (or direct matrix inver-sion). This comparison gives insight into the performance of paral-lel interference cancellation (PIC) and leads to vetter approaches. We also show that non-linear PIC approaches with explicit chan-nel setimation can provide performance improvement over linear PIC, especially when using soft non-linear symbol estimates. The application of interference cancellation to non-linear modulation techniques is also presented along with a discussion on minimum mean-squared error(MMSE) symbol estimation techniques. These are shown to further improve the performance of parallel cancella-tion.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 추계학술대회 논문집
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• pp.197-203
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• 2005

This paper presents kinematic calibration of parallel manipulators with partial pose measurements using a device that measures a rotation of the end-effector along with its position. The device contains an LVDT, a biaxial inclinometer, and a rotary sensor and facilitates automation of the measurement procedure. The device is designed in a modular fashion and links of different lengths can be used. The additional kinematic parameters required for the measurement device are discussed, kinematic relations are derived, and cost function is established to perform calibration with the proposed device. The study is performed for a six degree-of-freedom(DOF) fully parallel HexaSlide Mechanism(HSM). Experimental results show significant improvement in the accuracy of the HSM.

• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2001년도 학술대회 논문집
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• pp.185-188
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• 2001

Magnetization loss of a Bi-2223 tape in magnetic fields parallel to the tape surface was measured by a magnetization method. The results indicate that the magnetization loss is hysteretic because the measured loss agrees well with calculated one from a critical state model. In the full field penetration case the magnetization loss increases with the frequency but in the partial field penetration case the influence of the frequency is opposite.