• Journal of Power Electronics
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• v.14 no.1
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• pp.22-29
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• 2014

Current sharing between modules in a converter parallel operation is very important for the reliability of the system. This paper proposes an improved droop method that can effectively improve current sharing accuracy. The proposed method adaptively adjusts the output voltage set-point of each module according to the current set-points. Unlike conventional droop control, modules share a signal line to communicate with each other. Nevertheless, since signals are simple and in digital form, the complexity of the circuitry is much less and noise immunity is much better than those of conventional methods utilizing communication. The operation principle and design procedure of the proposed method are described in detail. Results of the experiment on two boost converters operating in parallel under the specification of a TFT LCD TV panel power supply verify the validity of the proposed scheme.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.4
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• pp.15-21
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• 2002

This paper presents parallel operation of ZVT(Zero Voltage Transition) FUll Bridge Converter with Dynamic Current Shared Inductor. In the conventional method, CT(Current Transformer) have been used tn share the load current equally with converters. In this system, at parallel operation of ZVT Full Bridge Converter, dynamic current shared inductor divides the same current of unit converter and ZVT circuit aids to high efficiency. Superiority of the characteristics is verified through the experiment with a 2[㎾], 50[㎑] prototype converter.

• Journal of the Korean Solar Energy Society
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• v.37 no.3
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• pp.13-22
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• 2017

Anti-islanding scheme of grid-connected inverter is a key function of standards compliance, since unintentional islanding results in safety hazards, reliability, and many other issues. Therefore, many anti-islanding schemes have been researched, however, most of them have problems, which deteriorate performance of islanding detection under parallel-operation. Therefore, this paper proves the reason of problems and proposes a new anti-islanding scheme that has precise islanding detection under parallel-operation in single-phase and three-phase system. Finally, both simulation and experimental result validate the proposed scheme.

• Proceedings of the KIEE Conference
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• 1994.11a
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• pp.150-152
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• 1994

This paper deals with the parallel operation of inverters. To enlarge capacity of inverter system and reduce current ripples on inverter output side, two or more inverters are operated in parallel. Up to now six-step inverters and sinusoidal PWM inverters are considered in parallel operation, but using space-vector PWM inverters we can get many advantages of reducing ripple current energy and torque ripple and so on. As we can choose effective voltage vectors more freely than single operation, inverter output current ripples can be reduced by shifting beginning and end point of switching state back and forth.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.268-273
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• 2002

In this paper, a new parallel multiplier circuit over $GF(2^m)$ has been proposed. The new multiplier is composed of polynomial multiplicative operation part and modular arithmetic operation part, irreducible polynomial operation part. And each operation has modular circuit block. For design the new proposed circuit, it develop generalized equations using frame each operation idea and show a example for $GF(2^m)$.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.501-505
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• 2001

The parallel operation system of UPS is used to increase reliability of power source at critical load. But parallel UPS system has a few defects, impedance is different from each other and circulating current occurs between UPSs, due to line impedance and parameter variation, though controlled by the same synchronization signal. According to such characteristic of parallel UPS, balanced load-sharing control is the most important technique in parallel UPS operation. In this paper, a novel power deviation compensation algorithm is proposed. it is composed of voltage controller to compensate power deviation that be calculated by using active and reactive current deviation between inverters on synchronous d-q reference frame.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.6
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• pp.585-592
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• 2003

The parallel operation system of UPS is used to increase reliability of power source at critical load. But parallel UPS system has a few defects, impedance is different from each other and circulating current occurs between UPSs, due to line impedance and parameter variation, though controlled by the same synchronization signal. According to such characteristic of parallel UPS, balanced load-sharing control is the most important technique in parallel UPS operation. In this paper, a novel power deviation compensation algorithm is proposed. it is composed of voltage controller to compensate power deviation that be calculated by using active and reactive current deviation between Inverters on synchronous d-q reference frame.

• ETRI Journal
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• v.31 no.5
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• pp.510-517
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• 2009

A high throughput parallel decoding method is developed for context-based adaptive variable length codes. In this paper, several new design ideas are devised and implemented for scalable parallel processing, a reduction in area, and a reduction in power requirements. First, simplified logical operations instead of memory lookups are used for parallel processing. Second, the codes are grouped based on their lengths for efficient logical operation. Third, up to M bits of the input stream can be analyzed simultaneously. For comparison, we designed a logical-operation-based parallel decoder for M=8 and a conventional parallel decoder. High-speed parallel decoding becomes possible with our method. In addition, for similar decoding rates (1.57 codes/cycle for M=8), our new approach uses 46% less chip area than the conventional method.

• Journal of Korea Multimedia Society
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• v.16 no.4
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• pp.444-452
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• 2013

Operation time of a function or procedure is a thing that always needs to be optimized. Parallelizing the operation is the general method to reduce the operation time of the function. One of the most powerful parallelizing methods is using GPU. In image processing field, one of the most commonly used operations is morphology operation. Three types of morphology operations kernel, na$\ddot{i}$ve, global and shared, are presented in this paper. All kernels are made using CUDA and work parallel on GPU. Four morphology operations (erosion, dilation, opening, and closing) using square structuring element are tested on MRI images with different size to measure the speedup of the GPU implementation over CPU implementation. The results show that the speedup of dilation is similar for all kernels. However, on erosion, opening, and closing, shared kernel works faster than other kernels.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.1
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• pp.20-25
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• 2011

This paper analyzed the application of Superconducting Fault Current Limiter (SFCL) on 22.9 [kV] bus tie in a power distribution system. Commonly, the parallel operations of power main transformers offer a lot of merits. However, when a fault occurs in the parallel operation of power main transformer, the fault currents might exceed the interruption capacity of existing protective devices. To resolve this problem, thus, the SFCL has been studied as the fascinating device. In case that, Particularly, the SFCL could be installed to parallel operation of various power main transformers in power distribution system of the Korea Electric Power Corporation (KEPCO) on 22.9 [kV] bus tie, the effect of the resistance of SFCL could reduce the increased fault currents and meet the interruption capacity of existing protective devices by them. Therefore, we analyzed the effect of application and proposed the proper impedance of the R-type SFCL on 22.9 [kV] bus tie in a power distribution system using PSCAD/EMTDC.