• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.1-8
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• 2009

We designed an ADC that operated upto 500Msamples/sec based on proposed R-string folding block as well as second folding block. The upper four bits are processed in parallel by the R-string folding block while the lower four bits are processed in pipeline structured second folding block to supply digital output. To verify the circuit performance, we conducted HSPICE simulation and the average power consumption was only 1.34mW even when the circuit was running at its maximum sampling frequency. We further measured noise immunity by applying linear ramp signal to the input. The DNL was between -0.56*LSB and 0.49*LSB and the INL was between -0.93*LSB and 0.72*LSB. We used 0.35 microns MOSIS device parameters for this work.

• Proceedings of the Korean Society of Medical Physics Conference
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• 2002.09a
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• pp.373-375
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• 2002

4D CT is a dynamic volume imaging system of moving organs with an image quality comparable to conventional CT, and is realized with continuous and high-speed cone-beam CT. In order to realize 4D CT, we have developed a novel 2D detector on the basis of the present CT technology, and mounted it on the gantry frame of the state-of-the-art CT-scanner. In the present report we describe the design of the first model of 4D CT-scanner as well as the early results of performance test. The x-ray detector for the 4D CT-scanner is a discrete pixel detector in which pixel data are measured by an independent detector element. The numbers of elements are 912 (channels) ${\times}$ 256 (segments) and the element size is approximately 1mm ${\times}$ 1mm. Data sampling rate is 900views(frames)/sec, and dynamic range of A/D converter is 16bits. The rotation speed of the gantry is l.0sec/rotation. Data transfer system between rotating and stationary parts in the gantry consists of laser diode and photodiode pairs, and achieves net transfer speed of 5Gbps. Volume data of 512${\times}$512${\times}$256 voxels are reconstructed with FDK algorithm by parallel use of 128 microprocessors. Normal volunteers and several phantoms were scanned with the scanner to demonstrate high image quality.

• Journal of IKEEE
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• v.24 no.2
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• pp.392-402
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• 2020

This paper proposes a solar tracking system without photo-sensors. The system can be classified into four modules: Solar Tracking, MPPT, ESS, and Real-Time Monitoring. Nine solar panels, as a basic unit, are adopted with grid structures of different heights to reduce wind influence and to enable solar tracking without photo-sensors. The low-cost MCU implements MPPT method which generates PWM switching signal for boost converter. The unit of ESS consists of three-series and four-parallel lithium-ion batteries in order to enable monitoring for abnormalities in temperature and electrical characteristics of battery. Four MCUs used in the system consists of two AVR Atmega128, and two Raspberry PI, and they exchanges operation informations. Experimental results of the proposed system show the solar tracking performance, the possibility of on-site and remote monitoring and the convenience of maintenance based on IoT technology.

• Proceedings of the KOSOMBE Conference
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• v.1997 no.11
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• pp.365-368
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• 1997

We are developing a small gamma camera or imaging malignant breast tumors. The small scintillation camera system consists of NaI(Tl) crystal ($60\;{\times}\;60\;{\times}\;6\;mm^3$) coupled to position sensitive photomultiplier tube (PSPMT), nuclear instrument module (NIM), analog to digital converter (ADC), and personal computer. High quality flood source image and hole mask image were obtained using the gamma camera developed in this study. Breast phantom containing $2{\sim}7\;mm$ diameter spheres was successfully imaged with parallel hole collimator. The obtained image displayed accurate activity distribution over the imaging field of view. Linearity and uniformity correction algorithms are being developed. It is believed that the developed small gamma camera could be useful or detection of malignant breast cancer.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1110-1121
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• 2016

The mathematical model of a three phase PWM converter under the stationary αβ reference frame is deduced and constructed based on a Proportional-Resonant (PR) regulator, which can replace trigonometric function calculation, Park transformation, real-time detection of a Phase Locked Loop and feed-forward decoupling with the proposed accurate calculation of the inductance voltage vector. To avoid the parallel resonance of the LCL topology, the active damping method of the proportional capacitor-current feedback is employed. As to current vector error elimination, an optimized PR controller of the inner current loop is proposed with the zero-pole matching (ZPM) and cancellation method to configure the regulator. The impacts on system's characteristics and stability margin caused by the PR controller and control parameter variations in the inner-current loop are analyzed, and the correlations among active damping feedback coefficient, sampling and transport delay, and system robustness have been established. An equivalent model of the inner current loop is studied via the pole-zero locus along with the pole placement method and frequency response characteristics. Then, the parameter values of the control system are chosen according to their decisive roles and performance indicators. Finally, simulation and experimental results obtained while adopting the proposed method illustrated its feasibility and effectiveness, and the inner current loop achieved zero static error tracking with a good dynamic response and steady-state performance.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.3
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• pp.20-28
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• 2002

This paper describes the time sharing type high frequency resonant inviter can be used as power of induction heating. This closed inverter can be obtained output frequency three times than switching frequency by composing three unit inviter of conventional Half-Bridge serial resonant inverter in parallel with input power source also, this reduce switching loss because it has ZVS function. The analysis of the proposed circuit is generally described by using the normailized proposed parameters. The principle of basic operating and the its charasteristics are extimated by the parameters such as switching frequency($\mu$), the variation of Phase angle($\phi$) of Phase-shift. Experimental results are presented to verify theoretical discussion. This preposed inverter will be able to be prastically used as a power supply in various fields as induction, heating application, DC-DC converter etc.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.1
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• pp.16-28
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• 2014

This paper presents a novel high-power-factor circuit topology of AC to AC current-fed type high frequency resonant inverter which includes the function of power factor correction(PFC) in the proposed inverter to operate the AC input block with high power factor. The proposed circuit topology of AC to AC current fed type high resonant inverter removes DC link electrolytic capacitor and has also the one of power factor correction(PFC) in the inverter circuit without an additional PFC circuit since the input current by constituting it in parallel as an unit inverter, which assumes the class-E high frequency resonant inverter of conventional current-fed type, flows in the form of the resultant current flowing through each constant current reactor($L_{d1}$, $L_{d2}$). The circuit analysis of proposed inverter is generally described by adopting the normalized parameters and the evaluation of its operating characteristics are conducted by using the parameters such as the ratio of switching and resonant frequency(${\mu}$), coupling coefficient(k) and so on. An example of procedure for circuit design based on the characteristic values obtained from the theoretical analysis is presented. To confirm the validity of the theoretical analysis, the experimental results are also presented. In the future, the proposed inverter shows it can be practically used as power supply system for induction heating application, DC-DC converter etc.

• Journal of Biomedical Engineering Research
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• v.19 no.2
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• pp.143-152
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• 1998

In this paper, we present the performances of a Doppler system using single channel RF(Radio Frequency) sampling. This technique consists of undersampling the ultrasonic blood backscattered RF signal on a single channel. Conventional undersampling method in Doppler imaging system have to use a minimum of two identical parallel demodulation channels to reconstruct the multigate analytic Doppler signal. However, this system suffers from hardware complexity and problem of unbalance(gain and phase) between the channels. In order to reduce these problems, we have realized a multigate pulsed Doppler system using undersampling on a single channel, It requires sampling frequency at $4f_o$(where $f_o$ is the center frequency of the transducer) and 12bits A/D converter. The proposed " single-Channel RF Sampling" method aims to decrease the required sampling frequency proportionally to $4f_o$/(2k+1). To show the influence of the factor k on the measurements, we have compared the velocity profiles obtained in vitro and in vivo for different intersequence delays time (k=0 to 10). We have used a 4MHz center frequency transducer and a Phantom Doppler system with a laminar stationary flow. The axial and volumetric velocity profiles in the vessel have been computed according to factor k and have been compared. The influence of the angle between the ultrasonic beam and the flow axis direction, and the fluid viscosity on the velocity profiles obtained for different values of k factor is presented. For experiment in vivo on the carotid, we have used a data acquisition system with a sampling frequency of 20MHz and a dynamic range of 12bits. We have compared the axial velocity profiles in systole and diastole phase obtained for single channel RF sampling factor.ng factor.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• v.2
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• pp.385-390
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• 2006

This paper examines the sampling and jitter specifications and considerations for Global Navigation Satellite Systems (GNSS) software receivers. Software radio (SWR) technologies are being used in the implementation of communication receivers in general and GNSS receivers in particular. With the advent of new GPS signals, and a range of new Galileo and GLONASS signals soon becoming available, GNSS is an application where SWR and software-defined radio (SDR) are likely to have an impact. The sampling process is critical for SWR receivers, where it occurs as close to the antenna as possible. One way to achieve this is by BandPass Sampling (BPS), which is an undersampling technique that exploits aliasing to perform downconversion. BPS enables removal of the IF stage in the radio receiver. The sampling frequency is a very important factor since it influences both receiver performance and implementation efficiency. However, the design of BPS can result in degradation of Signal-to-Noise Ratio (SNR) due to the out-of-band noise being aliased. Important to the specification of both the ADC and its clocking Phase- Locked Loop (PLL) is jitter. Contributing to the system jitter are the aperture jitter of the sample-and-hold switch at the input of ADC and the sampling-clock jitter. Aperture jitter effects have usually been modeled as additive noise, based on a sinusoidal input signal, and limits the achievable Signal-to-Noise Ratio (SNR). Jitter in the sampled signal has several sources: phase noise in the Voltage-Controlled Oscillator (VCO) within the sampling PLL, jitter introduced by variations in the period of the frequency divider used in the sampling PLL and cross-talk from the lock line running parallel to signal lines. Jitter in the sampling process directly acts to degrade the noise floor and selectivity of receiver. Choosing an appropriate VCO for a SWR system is not as simple as finding one with right oscillator frequency. Similarly, it is important to specify the right jitter performance for the ADC. In this paper, the allowable sampling frequencies are calculated and analyzed for the multiple frequency BPS software radio GNSS receivers. The SNR degradation due to jitter in a BPSK system is calculated and required jitter standard deviation allowable for each GNSS band of interest is evaluated. Furthermore, in this paper we have investigated the sources of jitter and a basic jitter budget is calculated that could assist in the design of multiple frequency SWR GNSS receivers. We examine different ADCs and PLLs available in the market and compare known performance with the calculated budget. The results obtained are therefore directly applicable to SWR GNSS receiver design.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.3
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• pp.491-499
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• 2019

Recently, there has been increasing demand for power quality in power supply devices. The IEC 61000-3-2 standard requires that the AC / DC power supply for lighting meet the specifications for the power factor (PF) and total waveform distortion (THD). In addition, advanced countries in Europe are regulating the ripple rate as 15 ~ 30% for the flicker phenomenon caused by the change in the amount of foot energy due to the change in current of the output terminal. Therefore, domestic standards and regulations are being updated. This study adopted the Flyback converter to satisfy the PFC standard, and has the circuit first and second insulation function. To reduce the low frequency ripple of the LED current, Flyback, Coupled Inductor, LC parallel resonance filter, LLC resonance filter, and Cuk were simulated by PSIM to mimic each LED driving circuit. A coupled LC resonant circuit with a coupled inductor on the primary side and LC resonance on the secondary side was also proposed for output side ripple reduction.