• Title/Summary/Keyword: Parallel coding

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An Efficient Parallelization Implementation of PU-level ME for Fast HEVC Encoding (고속 HEVC 부호화를 위한 효율적인 PU레벨 움직임예측 병렬화 구현)

  • Park, Soobin;Choi, Kiho;Park, Sang-Hyo;Jang, Euee Seon
    • Journal of Broadcast Engineering
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    • v.18 no.2
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    • pp.178-184
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    • 2013
  • In this paper, we propose an efficient parallelization technique of PU-level motion estimation (ME) in the next generation video coding standard, high efficiency video coding (HEVC) to reduce the time complexity of video encoding. It is difficult to encode video in real-time because ME has significant complexity (i.e., 80 percent at the encoder). In order to solve this problem, various techniques have been studied, and among them is the parallelization, which is carefully concerned in algorithm-level ME design. In this regard, merge estimation method using merge estimation region (MER) that enables ME to be designed in parallel has been proposed; but, parallel ME based on MER has still unconsidered problems to be implemented ideally in HEVC test model (HM). Therefore, we propose two strategies to implement stable parallel ME using MER in HM. Through experimental results, the excellence of our proposed methods is shown; the encoding time using the proposed method is reduced by 25.64 percent on average of that of HM which uses sequential ME.

Implementation of Channel Coding System using Viterbi Decoder of Pipeline-based Multi-Window (파이프라인 기반 다중윈도방식의 비터비 디코더를 이용한 채널 코딩 시스템의 구현)

  • Seo Young-Ho;Kim Dong-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.587-594
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    • 2005
  • In the paper, after we propose a viterbi decoder which has multiple buffering and parallel processing decoding scheme through expanding time-divided imput signal, and map a FPGA, we implement a channel coding system together with PC-based software. Continuous input signal is buffered as order of decoding length and is parallel decoded using a high speed cell for viterbi decoding. Output data rate increases linearly with the cell formed the viterbi decoder, and flexible operation can be satisfied by programming controller and modifying input buffer. The tell for viterbi decoder consists of HD block for calculating hamming distance, CM block for calculating value in each state, TB block for trace-back operation, and LIFO. The implemented cell of viterbi decoder used 351 LAB(Logic Arrary Block) and stably operated in maximum 139MHz in APEX20KC EP20K600CB652-7 FPGA of ALTERA. The whole viterbi decoder including viterbi decoding cells, input/output buffers, and a controller occupied the hardware resource of $23\%$ and has the output data rate of 1Gbps.

Parallel Coding Scheme for Flicker Mitigation in MIMO-VLC (다중입출력 가시광통신에서 플리커 현상을 완화하기 위한 병렬 코딩 기법)

  • Jeong, Jin-uk;Lee, Kye-san;Seo, Hyo-duck;Han, Doo-hee;Lee, Kyu-jin
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.15 no.3
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    • pp.146-154
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    • 2016
  • Visible light communication using LED is a technique for transmitting digital data using the light of the LED. Recently, high-speed data rate plays an important role. Therefore, many scholars have researched the MIMO-VLC which is able to increase data rate using a lot of LED transmitters. However, it has problems such as light interference and flicker when transmitting different bit. Many researcher have focused on reduce interference. However it is not considered about flicker problem. Flicker is defined unstable brightness. It occurred the tired of human eyes, lowers eyesight and also decreases concentration. In order to solve this flicker problem in MIMO-VLC, we propose the PFM(Parallel Flicker Mitigation) code. PFM code using combinatorial theory can maintain constant brightness the whole bit duration. Therefore, it is possible to assure the brightness by confirm simulation results.

Parallelization Method of Slice-based video CODEC (슬라이스 기반 비디오 코덱 병렬화 기법)

  • Nam, Jung-Hak;Ji, Bong-Il;Jo, Hyun-Ho;Sim, Dong-Gyu;Cho, Dae-Sung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.6
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    • pp.48-56
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    • 2010
  • Recently, we need to dramatically speed up real-time video encoding and decoding on mobile devices because complexity of video CODEC is significantly increasing along with the demand for multimedia service of high-quality and high-definition videos by users. A variety of research is conducted for parallelism of video processing using newly developed multi-core platforms. In this paper, we propose a method of parallelism based on slice partition of video compression CODEC. We propose a novel concept of a parallel slice for parallelism and propose a new coding order to be adequate to the parallel slice which keeps high coding efficiency. To minimize synchronization time of multiple parallel slices, we also propose a synchronization method to determinate whether the parallel slice could be independently decoded or not. Experimental results shows that we achieved 27.5% (40.7%) speed-up by parallelism with bit-rate increase of 3.4% (2.7%) for CIF sequences (720p sequences) by implementing the proposed algorithm on the H.264/AVC.

A Design of the TCM Decoder for DAB Receiver (DAB 수신기용 TCM 디코더의 설계)

  • Kim, Duck-Hyun;Kim, Geon;Park, So-Ra;Chung, Young-Ho;Oh, Kil-Nam
    • Proceedings of the Korean Society of Broadcast Engineers Conference
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    • 1999.11b
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    • pp.173-178
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    • 1999
  • The Trellis Coded Modulation(TCM) allows the considerable achievements of coding gains compare with conventional multi-level modulation without compromising bandwidth efficiency. In this paper, we are presented a design of the parallel Viterbi decoder for 16-QAM TCM decoder with large constraint length (K=9), which can be applicable for the Digital Audio Broadcasting(DAB) receiver. As a mid-term result, a parallel Branch Metric Calculator (BMC)can compute 16 BMs within 3 clocks and a parallel 16 Add-Compare-Selects (ACS) unit can compute in a single clock. And also, two 256 Path Metric Memories (PMM) 32 Trace Back(TB) memories are specially designed with shuffle exchange switches for 16 parallel accesses. As a VHDL simulation, we can find the correctness of proposed model, which can be operated 16 S per symbol. Now, we are performing the hardware reduction for realtime operation and FPGA implementation.

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A Parallel Video Encoding Technique for U-HDTV (U-HDTV를 위한 향상된 병렬 비디오 부호화 기법)

  • Jung, Seung-Won;Ko, Sung-Jea
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.48 no.1
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    • pp.132-140
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    • 2011
  • Ultra-High Definition Television (U-HDTV) is a promising candidate for the next generation television. Since the U-HDTV video signal requires a huge amount of data, parallel implementation of the U-HDTV compression system is highly demanding. In the conventional parallel video codec, a video is divided into sub-sequences and the sub-sequences are independently encoded. In this paper, for efficient parallel processing, we propose a pipelined encoding structure which exploits cross-correlation among the sub-sequences. The experimental results demonstrate that the proposed technique improves the coding efficiency and provides the sub-sequences of the balanced visual quality.

A Study on the Hierachical Coding of the Angiography by Using the Scalable Structure in the MPACS System (MPACS 시스템에서 Scalable 구조를 이용한 심장 조영상의 계층적 부호화에 관한 연구)

  • Han, Young-Oh;Jung, Jae-Woo;Ahn, Jin-Ho;Park, Jong-Kwan;Shin, Joon-In;Park, Sang-Hui
    • Proceedings of the KOSOMBE Conference
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    • v.1995 no.05
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    • pp.235-238
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    • 1995
  • In this paper, we propose an effective coding method of the angiography by using the scalable structure in the frequency domain for MPACS(Medical Picture Archiving and Communication System). We employed the subband decomposition method and MPEG-2 system which is the international standard coding method of the general moving picture. After the subband decomposition is applied to split an input image into 4 bands in the spatial frequency domain, the motion compensated DPCM coding method of MPEG-2 is carried out for each subband. As a result, an easily controllable coding Structure is accomplished by composing the compound hit stream for each subband group. Follows are the simulation results of the proposed sheme for the angiography. A scalable structure which can be easily controlled for a loss of transmission or the band limit can be accomplisbed in the MPEG-2 stucture by the subband decomposition minimizing the side information. And by reducing the search area of the motion vector between -4 and 3, the processing speed of a codec is enhanced by more than two times without a loss of the picture quality compare with the conventional DCT coefficients decompositon method. And the processing speed is considerably improved in the case of the parallel construction of each subband in the hardware.

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Turbo Coded MIMO System with Adaptive Turbo Space- Time Processing for High-Speed Wireless Communications (고속 무선 통신을 위한 적응형 터보 시공간 처리를 갖는 터보 부호화된 다중 입출력 시스템)

  • 조동균;김상준;박주남;황금찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.9C
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    • pp.843-850
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    • 2003
  • Turbo coding and turbo processing have been known as methods close to Shannon limit in the aspect of wireless MIMO communications similarly to wireless single antenna communication. The iterative processing can maximize the mutual effect of coding and interference cancellation, but turbo coding has not been used for turbo processing because of the inherent decoding process delay. This paper proposes a turbo coded MIMO system with adaptive turbo parallel space-time (Turbo-PAST) processing for high-speed wireless communications and a enhanced cyclic redundancy check (E-CRC) scheme as an efficient and simple priori stopping criterion. Simulation results show that the Turbo-PAST outperforms conventional system with 1.3dB and the proposed E-CRC scheme effectively reduces the amount of turbo processing iterations from the point of average number of iterations.

A design of CAVLC(Context-Adaptive Variable Length Coding) for H.264 (H.264 CAVLC(Context-Adaptive Variable Length Coding)설계)

  • Lee, Yong-Ju;Suh, Ki-Bum
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.108-111
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    • 2008
  • In this paper, we propose an advanced hardware architecture for the CAVLC entropy encoder engine for real time Full HD video compression. Since there are 384 data coefficients which are sum of 376 AC coefficient and 8 DC coefficient per one macroblock, 384 coefficient have to be processed per one macroblock in worst case for real time processing. We propose an novel architecture which includes parallel architecture and pipeline processing, and reduction "0" in AC/DC coefficient table. To verify the proposed architecture, we develop the reference C for CAVLC and verified the designed circuit with the test vector from reference C code.

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Evolutionary Neural Network based on DNA coding method for Time series prediction (시계열 예측을 위한 DNA코딩 기반의 신경망 진화)

  • 이기열;이동욱;심귀보
    • Journal of the Korean Institute of Intelligent Systems
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    • v.10 no.4
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    • pp.315-323
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    • 2000
  • In this paper, we propose a method of constructing neural networks using bio-inpired emergent and evolutionary concepts. This method is algorithm that is based on the characteristics of the biological DNA and growth of plants, Here is, we propose a constructing method to make a DNA coding method for production rule of L-system. L-system is based on so-called the parallel rewriting nechanism. The DNA coding method has no limitation in expressing the produlation the rule of L-system. Evolutionary algotithms motivated by Darwinaian natural selection are population based searching methods and the high performance of which is highly dependent on the representation of solution space. In order to verify the effectiveness of our scheme, we apply it one step ahead prediction of Mackey-Glass time series, Sunspot data and KOSPI data.

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