• Journal of Electrical Engineering and Technology
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• v.8 no.3
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• pp.499-506
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• 2013

The accurate estimation of a fault location is desired in distance protection schemes for transmission lines in order to selectively deactivate a faulted line. However, a typical method to estimate a fault location by calculating impedances with voltages and currents at relaying points may have errors due to various factors such as the mutual impedances of lines, fault impedances, or effects of parallel circuits. The proposed algorithm in this paper begins by extracting the fundamental phasor of the positive sequence currents from the three phase currents. The second-order difference of the phasor is then calculated based on the fundamental phasor of positive sequence currents. The traveling times of the waves generated by a fault are derived from the second-order difference of the phasor. Finally, the distance from the relaying point to the fault is estimated using the traveling times. To analyze the performance of the algorithm, a power system with EHV(Extra High Voltage) untransposed double-circuit transmission lines is modeled and simulated under various fault conditions, such as several fault types, fault locations, and fault inception angles. The results of the simulations show that the proposed algorithm has the capability to estimate the fault locations with high speed and accuracy.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.108-111
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• 2008

In this paper, we propose an advanced hardware architecture for the CAVLC entropy encoder engine for real time Full HD video compression. Since there are 384 data coefficients which are sum of 376 AC coefficient and 8 DC coefficient per one macroblock, 384 coefficient have to be processed per one macroblock in worst case for real time processing. We propose an novel architecture which includes parallel architecture and pipeline processing, and reduction "0" in AC/DC coefficient table. To verify the proposed architecture, we develop the reference C for CAVLC and verified the designed circuit with the test vector from reference C code.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.245-247
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• 2006

현재 LCB 인버터의 경쟁력을 키우기 위해 인버터 하나로 다수의 램프를 병렬 구동하는 방식이 많이 사용되고 있다. 본 논문에서는 병렬 구동방식 중 Jin Balance와 O2 Micro 방식에 대해 이론적으로 분석하고, 특히 각각의 램프 전류 편차를 일정하게 유지하기 위한 자화 인덕턴스 값의 설계에 대하여 설명하였다. 위의 결과를 이용하여 새로운 전류 평형 방식을 제안하고 수학적으로 분석하였으며, 제안 방식의 정확성을 시뮬레이션을 통해 검증하였다.

• Journal of Power Electronics
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• v.16 no.2
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• pp.436-446
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• 2016

A novel step-up DC-DC converter with a switched-coupled-inductor-capacitor (SCIC) which successfully integrates three-winding coupled inductors and switched-capacitor techniques is proposed in this paper. The primary side of the coupled inductors for the SCIC is charged by the input source, and the capacitors are charged in parallel and discharged in series by the secondary windings of the coupled inductor to achieve a high step-up voltage gain with an appropriate duty ratio. In addition, the passive lossless clamped circuits recycle the leakage energy and reduce the voltage stress on the main switch effectively, and the reverse-recovery problem of the diodes is alleviated by the leakage inductor. Thus, the efficiency can be improved. The operating principle and steady-state analyses of the converter are discussed in detail. Finally, a prototype circuit at a 50 kHz switching frequency with a 20-V input voltage, a 200-V output voltage, and a 200-W output power is built in the laboratory to verify the performance of the proposed converter.

• Journal of Electrical Engineering and Technology
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• v.6 no.3
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• pp.293-301
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• 2011

This paper presents a novel theoretical method based on power analysis to obtain voltage reference values for an inverter-based compensator. This type of compensator, which is installed in parallel with the load, is usually referred to as the active filter. The proposed method is tailored to design the compensator in such a way that it can simultaneously balance the asymmetric load, as well as correct the power factor of the supply side. For clarity, a static compensator is first considered and a recursive algorithm is utilized to calculate the reactance values. The algorithm is then extended to calculate voltage reference values when the compensator is inverter based. It is evident that the compensator would be asymmetric since the load is unbalanced. The salient feature associated with the proposed method is that the circuit representation of system load is not required and that the load is recognized just by its active and reactive consumptions. Hence, the type and connection of load do not matter. The validity and performance of the new approach are analyzed via a numerical example, and the obtained results are thoroughly discussed.

• Journal of Power Electronics
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• v.11 no.4
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• pp.527-532
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• 2011

Due to the need for improved fuel consumption and the trend towards increasing the electrical content in automobiles, integrated starter generator (ISG) systems are being considered by the automotive industry. In this paper, in order to change the conventional generator of a vehicle, a belt driven integrated starter generator is considered. The overall ISG system, the design considerations for the claw pole type AC electric machine and a low voltage very high current power stage implementation are discussed. Test data on the low voltage claw pole type machine is presented, and a large current voltage source DC/AC inverter suitable for low voltage integrated starter generator operation is also presented. A metal based PCB (Printed Circuit Board) power unit to attach the 4-parallel MOS-FETs is used to achieve extremely high current capability. Furthermore, issues related to the torque assistance during vehicle acceleration and the generation/regeneration characteristics are discussed. A prototype with the capability of up to 1000 A and 27 V is designed and built to validate the kilo-amp inverter.

• Journal of Power Electronics
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• v.7 no.1
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• pp.38-43
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• 2007

An External Electrode Fluorescent Lamp (EEFL) has longer lifespan, higher power efficiency and higher luminance than a Cold Cathode Fluorescent Lamp (CCFL). Moreover, it is easy to drive them in parallel. Therefore, the EEFL is expected to quickly replace the CCFL in LCD backlight systems. However, the EEFL has more complex characteristics than the CCFL with a resistive component, because it has both a resistive component by plasma and a capacitive component by external electrode. In this paper, values of resistance and capacitance are measured at several power levels and at several operating frequencies. They are expressed by a numeral formula based on a linear approximation that represents the equivalent resistance and capacitance as a function of power. Then we made block diagram of the equivalent circuit model using numerical expressions. Simulation waveforms and experimental results are presented to verify the feasibility of the equivalent model.

• Journal of Power Electronics
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• v.13 no.4
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• pp.592-599
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• 2013

This paper investigates a new isolated single-phase AC-DC converter, which integrates a modified AC-DC buck-boost converter with a DC-DC forward converter. The front semi-stage is operated in discontinuous conduction mode (DCM) to achieve an almost unity power factor and a low total harmonic distortion of the input current. The rear semi-stage is used for step-down voltage conversion and electrical isolation. The front semi-stage uses a coupled inductor with the same winding-turn in the primary and secondary sides, which is charged in series during the switch-on period and is discharged in parallel during the switch-off period. The discharging time can be shortened. In other words, the duty ratio can be extended. This semi-stage can be operated in a larger duty-ratio range than the conventional AC-DC buck-boost converter for DCM operation. Therefore, the proposed converter is suitable for universal input voltage (90~264 $V_{rms}$) and a wide output-power range. Moreover, the voltage stress on the DC-link capacitor is low. Finally, a prototype circuit is implemented to verify the performance of the proposed converter.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.4
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• pp.336-344
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• 2017

This paper presents the three-port DC-DC converter modeling and controller design procedure, which is part of the solid-state transformer (SST) to interface medium voltage AC grid to bipolar DC distribution network. Due to the high primary side DC link voltage, the proposed converter employs the three-level neutral point clamped (NPC) topology at the primary side and 2-two level half bridge circuits for each DC distribution network. For the proposed converter particular structure, this paper conducts modeling the three winding transformer and the power transfer between each port. A decoupling method is adopted to simplify the power transfer model. The voltage controller design procedure is presented. In addition, the output current sharing controller is employed for current balancing between the parallel-connected secondary output ports. The proposed circuit and controller performance are verified by experimental results using a 30 kW prototype SST system.

• Proceedings of the KIEE Conference
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• 2002.11b
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• pp.358-360
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• 2002

한국전력은 당진화력발전소로부터 신안성 변전소까지의 세계 최초로 수직배열 2회선의 765kV 송전선로를 건설하여 2002년 4월부터 1회선을 765kV로 가압하고 1회선은 345kV로 상업운전을 시작하였으며 2003년 이후 2회선을 모두 765kV 전압으로 가압 예정이다. 이러한 765kV 송전선로는 계통운영 측면에서 2회선 동시 휴전이 어려워 1회선 휴전 작업 및 향후 활선작업이 요구되는 중요선로이다. 765kV 1회선 휴전작업을 위해서는 765kV로 가압된 선로로부터 휴전선로의 작업자에게 발생될 수 있는 전기적 유도량에 대해 사전 검토하여 안전성을 확보하는 것이 필수적이다. 한국전력공사와 전력연구원은 1회선 휴전작업에 대한 안정성 검토를 위해 고창 실증시험선로를 이용하여 전기적 유도현상에 대한 시험을 실시하였다. 이 논문에서는 실증시험 선로를 모델로한 정전유도의 계산 결과와 실측치를 각각 비교, 검토하였다.