• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2005년도 학술대회 논문집
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• pp.265-269
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• 2005

Surge protective devices can be divided into three categories based on the circuit assembly: a parallel circuit type that considers the surge current amount within the device, a series circuit type that considers the voltage and single circuit type that uses a single element. However, when assembling SPDs, there are many things including function and safety to be taken into consideration because they are directly related to the performance and safety of the device. In this paper, we executed an experimental comparative study of performance and thermal stability of each SPD type using lightning surge generator and thermal image camera.

• 전기전자학회논문지
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• 제12권4호
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• pp.211-216
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• 2008

이 논문은 MOS 전류모드 논리 (MOS current-mode logic circuit, MCML) 회로를 이용하여 저 전력 특성을 갖는 8${\times}$8 비트 병렬 곱셈기를 설계하였다. 설계한 곱셈기는 회로가 동작 하지 않을 때의 정적 전류의 소모를 최소화하기 위하여 슬립 트랜지스터 (sleep-transistor)를 이용하여 저 전력 MOS 전류모드 논리회로를 구현하였다. 설계한 곱셈기는 기존 MOS 전류모드 논리회로에 비해 대기전력소모가 1/50으로 감소하였다. 또한, 이 회로는 기존 MOS 전류모드 논리회로에 비해 전력소모에서 10.5% 감소하였으며, 전력소모와 지연시간의 곱에서 11.6%의 성능 향상이 있었다. 이 회로는 삼성 0.35${\mu}m$ 표준 CMOS 공정을 이용하여 설계하였으며, HSPICE를 통하여 검증하였다.

• Journal of Power Electronics
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• 제15권6호
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

• 전력전자학회논문지
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• 제8권1호
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• pp.1-8
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• 2003

전력품질 문제를 해결할 때 직류전기아크로의 선인장치고서 높은 역률을 갖는 컨버터가 요구된다. 본 논문에서는 계통전압의 각 주기에서 커패시터와 인덕터의 공진회로가 부하변수에 따라서 직렬연결상태에서 병력연결상태로, 혹은 그 반대로 전환하면서 고역율을 유지하는 50(60)Hz 교류에서 직류로 변환하는 공진형컨버터가 묘사된다. 직렬연결과 병렬연결의 기간과 변환비는 부하에 따라서 결정되면 병력 공진회로는 단락회로를 제한한다. 이 공진형컨버터는 무부하에서 단락회로의 범위까지 높은 역률을 가지며 아크로에 전원공급을 하는 장치로 매우 적당하다.

• Journal of Chest Surgery
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• 제57권2호
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• pp.225-229
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• 2024

Venovenous (VV) extracorporeal membrane oxygenation (ECMO) is a lifesaving technique for patients experiencing respiratory failure. When VV ECMO fails to provide adequate support despite optimal settings, alternative strategies may be employed. One option is to add another venous cannula to increase venous drainage, while another is to insert an additional arterial return cannula to assist cardiac function. Alternatively, a separate ECMO circuit can be implemented to function in parallel with the existing circuit. We present a case in which the parallel ECMO method was used in a 63-year-old man with respiratory failure due to coronavirus disease 2019, combined with cardiac dysfunction. We installed an additional venoarterial ECMO circuit alongside the existing VV ECMO circuit and successfully weaned the patient from both types of ECMO. In this report, we share our experience and discuss this method.

• ETRI Journal
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• 제24권6호
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• pp.462-464
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• 2002

This paper presents a serial interface circuit that permits selection of the amount of data converted from serial-to-parallel and parallel-to-serial and overcomes the disadvantages of the conventional serial input/output interface. Based on the selected data length operating mode, 8 bit or 16 bit serial-to-parallel and 8 bit or 16 bit parallel-to-serial conversion takes place in data blocks of the selected data length.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2002년도 학술대회논문집
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• pp.293-296
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• 2002

This paper describes the instantaneous current resultant type load parallel high frequency resonant inverter consisting of three unit half-bridge serial and parallel resonant inverter can be used as power source of induction heating. This proposed inverter can reduce distribution of the switching current because of using the current of serial resonant circuit to the input current of the parallel one. The analysis of the proposed circuit is generally described by using the normalized parameters. Also, the principle of basic operating and the its characteristics are estimated by the parameters such as switching frequency($\mu$), load resistance(λ). Experimental results are presented to verify theoretical discussion. This proposed inverter will can be practically used as a power supply in various fields as induction heating application, DC-DC converter etc.

• 한국전기전자재료학회논문지
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• 제26권6호
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• pp.488-492
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• 2013

Current limiting diode (CLD) was fabricated using junction field effect transistor (JFET) structured two small cells and eight large cells. Two small cells and eight large cells were connected in parallel and the obtained constant current was 110 mA. The application of CLD in each of the parallel circuits on chip on board (COB) type LED lighting source, could significantly reduce the current deviation within the parallel circuits. The applications of CLD on AC power small lighting source, battery power low voltage parallel lighting source and AC flat lighting source were investigated.

• 대한전자공학회논문지
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• 제27권8호
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• pp.1255-1259
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• 1990

A new ripple analog-to-digital converter (ADC) has been developed. It consists of two parallel ADCs and a switching network. The circuit operates on the analog input signal in two serial steps. First, a coarse conversion is made to determine the most significant bits by the first parallel ADC. The resultant bits control the switching network to connect a series resistor segment, within which the analog signal is contained, to the second parallel ADC. At second step, a fine conversion is made to determine the least significant bits by the second parallel ADC. The circuit requires 2(2\ulcorner\ulcorner1) comparators, 2(2\ulcorner\ulcorner resistors, and 2(2\ulcorner\ulcorner swithches for N-bit resolution.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.289-289
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• 2010

Translation Characteristics of Digital Decoder utilizing the analog parallel processing circuit technology is designed. The fast parallel viterbi decoder system acted by a replacement of the conventional digital viterbi Decoder has good propagation. we are applied proposed analog viterbi decoder to decode PR signal for DVD and analyze the specific circuit and signal characteristics.