• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.2
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• pp.94-102
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• 2020

Considering that the output voltage and current of a single PV panel are limited in PV power generation, a PV array should be constructed by connecting several PV panels in series and parallel to meet the required voltage/power levels for power generation capacity. When a PV array is partially shaded, the maximum power generation depends on the configuration of a PV array and the presence or absence of blocking diodes. This study considers six PV array configurations and the presence or absence of blocking diodes. An optimum connection structure was proposed to maximize power generation in a partial shadow condition. Results were verified through simulation and an experiment.

• The Transactions of the Korea Information Processing Society
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• v.2 no.6
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• pp.969-973
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• 1995

In this paper, a new parallel Multiplier array is proposed to reduce the multiplication time by modifying CAS(carry select adder) cell structure used in the conventional parallel multiplier array. It is named MCSA(modified CSA) that assignes the addend and augend to the inputs of CSA faster than Ci(carry input). Also the designed DCSA (doubled inverted input CSA) is appended after the last product term for the carry propagation adder. The proposed scheme is designed with MCSA and DCSA, and simulated. It is verified that the circuit size is increased about 13% compared with the conventional multiplier array with CSA cell but the operation time is reduced about 52%.

• The KIPS Transactions:PartA
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• v.9A no.2
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• pp.259-266
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• 2002

In this paper we implemented various image processing filtering using the format converter. This design method is based on realized the large processor-per-pixel array by integrated circuit technology. These two types of integrated structure are can be classify associative parallel processor and parallel process DRAM (or SRAM) cell. Layout pitch of one-bit-wide logic is Identical memory cell pitch to array high density PEs in integrate structure. This format converter design has control path implementation efficiently, and can be utilize the high technology without complicated controller hardware. Sequence of array instruction are generated by host computer before process start, and instructions are saved on unit controller. Host computer is executed the pixel-parallel operation starting at saved instructions after processing start. As a result, we obtained three result that 1) simple smoothing suppresses higher spatial frequencies, reducing noise but also blurring edges, 2) a smoothing and segmentation process reduces noise while preserving sharp edges, and 3) median filtering may be applied to reduce image noise. Median filtering eliminates spikes while maintaining sharp edges and preserving monotonic variations in pixel values.

• Journal of Biomedical Engineering Research
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• v.17 no.4
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• pp.459-468
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• 1996

This paper considers the problem of realising a parallel EMG identifier used in FES (functional electrical stimulation) system on a fixed dimension transputer array. This involves using an identifiestion algorithm in the wavelet transform domain. This algorithm have suggested by the authors in a previous paper(6). The transputer serial links permit higtlly varied and economic network-type connections and the structure enables rapid topological reconfiguration. Analysing the results Showed that the Speed-UPS ranged from 1.82 to 3.44 With 2-4 transputers for corresponding model order, and from 1.82 to 3.97 with increasing the model orders when two and four transputers are used respectively.

• Proceedings of the Korean Society of Medical Physics Conference
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• 2002.09a
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• pp.411-414
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• 2002

The CdTe semiconductor detector has a higher detection efficiency for x-rays and $\square$amma rays and a wider energy band gap compared with Si and Ge semiconductor detectors. Therefore, the size of the detector element can be made small, and can be operated at room temperature. The interaction between a CdTe detector and incident x-rays is mainly photoelectric absorption in the photon energy range of up to 100 keV. In this energy range, Compton effects are almost negligible. We have developed a 256 channel CdTe array detector system for monochromatic x-ray CT using synchrotron radiation. The CdTe array detector system, the element size of which is 1.98 mm (h) x 1.98 mm (w) x 0.5 mm (t), was operated in photon counting mode. In order to improve the spatial resolution, we tilted the CdTe array detector against the incident parallel monochromatic x-ray beam. The experiments were performed at the BL20B2 experimental hutch in SPring-8. The energy of incident monochromatic x-rays was set at 55 keV. Phantom measurements were performed at the detector angle of 0, 30 and 45 degrees against the incident parallel monochromatic x-rays. The linear attenuation coefficients were calculated from the reconstructed CT images. By increasing the detector angle, the spatial resolutions were improved. There was no significant difference between the linear attenuation coefficients which were corrected by the detector angle. It was found that this method was useful for improving the spatial resolution in a parallel monochromatic x-ray CT system.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.2
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• pp.110-118
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• 2008

The regulated peak power tracking (RPPT) systems such as the series structure and the parallel structure are commonly used in the satellite space power system. However, this structure processes the solar array power to the load through two regulators during one orbit cycle, which reduces the energy transfer efficiency. The series-parallel structure for the RPPT system can improve the power conversion efficiency, but an additional regulator increases the cost, size and weight of the system. In this paper, a simplified series-parallel space power system that consists of two regulators is proposed. The proposed system has the similar energy transfer efficiency with the series-parallel structure by adding one switch to the series structure, which reduces the cost, size and the weight. The large signal stability analyses is provided to understand the four main modes of system operation. In order to compare the energy efficiency with a series structure, the simulation is performed. The experimental verifications are performed using a prototype hardware with TMS320F2812 DSP and 200W solar arrays.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1914-1917
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• 2001

3D Feed Horn Shape MEMS Antenna Array는 적외선 이미지 소자 또는 Tera hertz band 등에서 많은 응용을 할 수 있는 장점을 가진 MEMS 구조체 이다. 하지만 일반적인 MEMS 공정을 이용해서 3D Feed Horn Shape MEMS antenna array를 구현하기는 적합하지 않았다. 본 논문에서는 마스크와 웨이퍼가 일체 된 형태의 경사된 척이 초 저속으로 회전하면서 노광을 할 수 있는 새로운 방식과 미러 반사구조를 이용해서 평행광을 얻을수 있는 노광장치 (MRPBI : Mirror Reflected Parallel Beam Illuminator) System제작방법을 제안하였다. 3D Feed Horn Shape MEMS Antenna의 구조적인 high apect ratio의 특성에 의해서 SU-8과 PMER Negative Photo resist를 이용한 기본적인 실험을 통해 3D 구조체의 구현 가능성을 증명하였다. 또한 Microbolometer의 성능향상을 위한 이론적인 3D MEMS Antenna Model들을 HFSS(High Frequency Structure Simulator)을 이용해서 그 최적구조를 제안하고 3D MEMS Antenna Gain 값을 비교 분석하였다.

• Journal of Power Electronics
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• v.16 no.2
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• pp.631-642
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• 2016

Usually, the output characteristics of a photovoltaic (PV) array are significantly affected by non-uniform irradiance which is caused by ambient obstacles, clouds, orientations, tilts, etc. Some local maximum power points (LMPP) in the current-voltage (I-V) curves of a PV array can result in power losses of the array. However, the output power at the global maximum power point (GMPP) is different in different interconnection schemes in a PV array. Therefore, based on the theoretical analysis and mathematical derivation of different topological structures of a PV array, this paper investigated the output characteristics of dual series PV arrays with different interconnections. The proposed mathematical models were also validated by experimental results. Finally, this paper also concluded that in terms of performance, the total cross tied (TCT) interconnection was not always the optimal structure, especially in a dual series PV array. When one of the PV modules was severely mismatched, the TCT worked worse than the series parallel (SP) structure. This research can provide guidance for switching the interconnection to gain the greatest energy yield in a changeable- structure PV system.

• ETRI Journal
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• v.31 no.6
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• pp.806-808
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• 2009

A new computationally efficient algorithm-based propagator method for two-dimensional (2-D) direction-of-arrival (DOA) estimation is proposed, which uses two parallel uniform linear arrays. The algorithm takes advantage of the special structure of the array which enables 2-D DOA estimation without pair matching. Simulation results show that the proposed algorithm achieves very accurate estimation at a computational cost 4 dB lower than that of standard methods.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.1
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• pp.137-146
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• 2009

We present a micromechanical digital-to-analog (DA) variable capacitor using a parallel digital actuator array, capable of accomplishing high-Q tuning. The present DA variable capacitor uses a parallel interconnection of digital actuators, thus achieving a low resistive structure. Based on the criteria for capacitance range ($0.348{\sim}1.932$ pF) and the actuation voltage (25 V), the present parallel DA variable capacitor is estimated to have a quality factor 2.0 times higher than the previous serial-parallel DA variable capacitor. In the experimental study, the parallel DA variable capacitor changes the total capacitance from 2.268 to 3.973 pF (0.5 GHz), 2.384 to 4.197 pF (1.0 GHz), and 2.773 to 4.826 pF (2.5 GHz), thus achieving tuning ratios of 75.2%, 76.1%, and 74.0%, respectively. The capacitance precisions are measured to be $6.16{\pm}4.24$ fF (0.5 GHz), $7.42{\pm}5.48$ fF (1.0 GHz), and $9.56{\pm}5.63$ fF (2.5 GHz). The parallel DA variable capacitor shows the total resistance of $2.97{\pm}0.29\;{\Omega}$ (0.5 GHz), $3.01{\pm}0.42\;{\Omega}$ (1.0 GHz), and $4.32{\pm}0.66\;{\Omega}$ (2.5 GHz), resulting in high quality factors which are measured to be $33.7{\pm}7.8$ (0.5 GHz), $18.5{\pm}4.9$ (1.0 GHz), and $4.3{\pm}1.4$ (2.5 GHz) for large capacitance values ($2.268{\sim}4.826$ pF). We experimentally verify the high-Q tuning capability of the present parallel DA variable capacitor, while achieving high-precision capacitance adjustments.