• 대한임베디드공학회논문지
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• 제18권4호
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• pp.165-172
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• 2023

Heterogeneous computing is a technology that utilizes different types of processors to perform parallel processing. It maximizes task processing and energy efficiency by leveraging various computing resources such as CPUs, GPUs, and FPGAs. On the other hand, edge computing has developed with IoT and 5G technologies. It is a distributed computing that utilizes computing resources close to clients, thereby offloading the central server. It has evolved to intelligent edge computing combined with artificial intelligence. Intelligent edge computing enables total data processing, such as context awareness, prediction, control, and simple processing for the data collected on the edge. If heterogeneous computing can be successfully applied in the edge, it is expected to maximize job processing efficiency while minimizing dependence on the central server. In this paper, experiments were conducted to verify the feasibility of various parallel programming models on high-end and low-end edge devices by using benchmark applications. We analyzed the performance of five parallel programming models on the Raspberry Pi 4 and Jetson Orin Nano as low-end and high-end devices, respectively. In the experiment, OpenACC showed the best performance on the low-end edge device and OpenSYCL on the high-end device due to the stability and optimization of system libraries.

• 한국지능정보시스템학회:학술대회논문집
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• 한국지능정보시스템학회 2006년도 춘계학술대회
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• pp.303-310
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• 2006

The sorting algorithms have been developed to take advantage of distributed computers. But the speedup of parallel sorting algorithms decrease rapidly with increased number of processors due to parallel processing overhead such as context switching time and inter-processor communication cost. In this paper, we propose a parallel sorting method which provides linear speedup of an optimal serial algorithm for a system with a large number of processors. This algorithm may even provide superlinear speedup for a practical system. The algorithm takes advantage of an interconnection network properties and its protocol.

• 디지털산업정보학회논문지
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• 제7권3호
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• pp.55-61
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• 2011

This paper presents an implementation of Lattice Reduction (LR)-aided detector for Multiple-Input Multiple-Output (MIMO) system using Graphics Processing Unit (GPU). GPU is a parallel processor which has a number of Arithmetic Logic Units (ALUs), thus, it can minimize the operation time of LR algorithm through the parallelization using multiple threads in the GPU. Through the implemented LR-aided detector, we verify that the LR-aided detector operates a lot faster than Maximum Likelihood (ML) detector. The implemented LR-aided detector has been applied to WiMAX system to show the feasibility of its real-time processing. In addition, we demonstrate that the processing time can be reduced at the cost of 3dB SNR loss by limiting the repeating loop in Lenstra-Lenstra-Lovasz (LLL) algorithm which is frequently used in LR-aided detector.

• 대한전자공학회논문지
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• 제26권10호
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• pp.1518-1527
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• 1989

We proposed a technique to design a multimicrocomputer system for real-time parallel processing with an interconnection network which has good network latency time. In order to simplify the performance evaluation and the design procedure under the hard real-time constraints we defined network latency time which takes into account the queueing delays of the networks. We designed a dynamic interconnection network following the proposed technique, and the simulation results show that we can easily estimate the multimicrocomputer system's approximate performance using the defined network latency time before the actual design, so this definition can help the efficient design of the real-time parallel processing systems.

• 한국군사과학기술학회지
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• 제25권4호
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• pp.372-380
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• 2022

This study proposes a distributed parallel processing system, called the Fast Analysis System for remote sensing daTa(FAST), for large-scale satellite image processing and analysis. FAST is a system that designs jobs in vertices and sequences, and distributes and processes them simultaneously. FAST manages data based on the Hadoop Distributed File System, controls entire jobs based on Apache Spark, and performs tasks in parallel in multiple slave nodes based on a docker container design. FAST enables the high-performance processing of progressively accumulated large-volume satellite images. Because the unit task is performed based on Docker, it is possible to reuse existing source codes for designing and implementing unit tasks. Additionally, the system is robust against software/hardware faults. To prove the capability of the proposed system, we performed an experiment to generate the original satellite images as ortho-images, which is a pre-processing step for all image analyses. In the experiment, when FAST was configured with eight slave nodes, it was found that the processing of a satellite image took less than 30 sec. Through these results, we proved the suitability and practical applicability of the FAST design.

• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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• 제8권3호
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• pp.251-260
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• 2002

웹에 존재하는 수많은 유휴상태 호스트들을 이용한 병렬/분산 처리는 대규모 응용문제에 대해 높은 가격 대 성능비를 가진다. 웹 환경에서 병렬/분산 처리를 위하여 호스트들의 이질성 및 가변성, 자율성, 지속적인 성능보장과 참여 호스트 수 변화 등 예측할 수 없는 상태에 대한 해결책을 제시하여야 한다. 본 논문은 지리적으로 떨어져 있는 참여 호스트들의 작업 처리를 성능에 기반하는 적응적 작업 재할당 전략을 제안한다. 또한, 대규모 응용문제의 병렬 처리 중에 호스트 수가 변하는 동적 환경에 대해 동적 호스트 관리 스킴을 제공한다. 본 논문에서는 PDSWeb (Parallel/Distributed Scheme on Web) 시스템을 구현하여, 많은 연산량을 지닌 랜더링 이미지 생성에 적용하여 평가한다. 그 결과 호스트의 가변성에 대해 적응적 작업 재할당은 최고 90%이상 향상하였으며. 호스트 추가와 삭제에 따른 성능 향상 정도를 보인다.

• 한국정보처리학회논문지
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• 제7권9호
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• pp.2827-2835
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• 2000

최근, 멀티미디어 정보처리와 같은 대규모 데이터 처리에 필수적인 입출력 시스템의 성능을 높이기 위하여 많은 관심이 집중되고 있으며, 고성능 병렬화일 시스템에 관한 연구도 이런 노력에 속한다. 본 연구에서는 고성능 병렬화일 시스템을 위한 효율적인 디스크 할당 방법을 제안한다. 즉, 병렬화일의 자료 분산(data declustering)특성을 이용하여 병렬화일에 대한 병렬도 개념을 정의하고, 이를 기반으로 여러 병렬화일들이 동시에 처리되는 경우에, 최대의 작업처리량(throughput)을 얻기 위한 각 병렬화일에 적합한 디스크상의 자료 분산 정도를 계산하는 방법을 제안한다. 또한 동시에 처리되는 병렬화일들이 많이 늘어날수록, 최대의 작업처리량을 얻기 위한 계산이 너무 복잡해지므로, 효율적인 근사 디스크 할당 알고리즘도 아울러 제안한다. 제안된 근사 알고리즘은 계산이 간단하고, 특히 입출력 작업부하(workload)가 높은 환경에서는 매우 효율적임을 보여준다. 또한 입출력 요구들의 도착 비율이 무한대일 경우, 근사 알고리즘만을 이용하여도 최대 작업처리량을 위한 최적 디스크 할당을 얻을 수 있음을 증명하였다.

• 산업경영시스템학회지
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• 제32권2호
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• pp.85-93
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• 2009

GOMS model is a cognitive modeling method of human performance based on Goal, Operators, Methods, Selection rules. GOMS model was originally designed for desktop environment so that it is difficult for GOMS model to be implemented into the mobile environment. In addition, GOMS model would be inaccurate because the original GOMS model was based on serial processing, excluding one of most important human information processing characteristics, parallel processing. Therefore this study was designed to propose a modified GOMS model including mobile computing and parallel processing. In order to encompass mobile environment, an operator of 'look for' was divided into 'visual move to' and 'recognize' whereas 'point to' and 'click' were combined into 'tab.' The results showed that newly introduced operators were necessary to estimate more accurate mobile computing behaviors. In conclusion, modified-GOMS model could predict human performance more accurately than the original GOMS model in the mobile computing environment.

• 전자공학회논문지
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• 제54권6호
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• pp.55-64
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• 2017

대용량 고화질의 영상 응용분야에서는 많은 양의 데이터를 고속으로 처리하는 기술이 필요하며, 이를 위해 고속화된 병렬처리 시스템이 요구된다. 2004년 park은 병렬처리 메모리의 충돌 없이 여러 처리기에 데이터를 접속할 수 있는 방법을 제안하였다. 제안된 MAMS(Multi-Access Memory System) 는 이후 MAMS-PP16 및 MAMS-PP64 등으로 추가적인 연구가 이루어졌다. MAMS는 병렬처리를 위한 메모리 아키텍처로써 One-chip으로 구성되어야하기 때문에 기존 MAMS와 동일한 기능을 수행하면서 아키텍처의 최소화 하는 방법의 연구가 필요하다. 주소 계산 (ACR : Address Calculation and Routing) circuit과 MMS(Memory Module Selection)circuit의 아키텍처는 메모리에 있는 데이터를 병렬처리기(Prossing Elements)들에게 전달한다. 본 논문에서는 MMS circuit을 사용하지 않고 ACR circuit 내부에 1개의 쉬프트와 메모리 모듈의 개수만큼의 조건문으로 구성하는 방법을 통해 아키텍처를 최소화 하는 방법을 제안한다. 구현한 아키텍처의 검증을 위해 Image correlation 실험을 하였다. 실험을 통하여 제안된 MAMS-PP64의 처리시간을 측정 하였으며, 그 결과 Ratio가 평균 1.05향상 된 결과를 확인 할 수 있었다.

• 한국정보과학회:학술대회논문집
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• 한국정보과학회 1998년도 가을 학술발표논문집 Vol.25 No.2 (3)
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• pp.765-767
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• 1998

Many application in human computer interaction(HCI) require tacking a human face and facial features. In this paper we propose efficient parallel processing system for face tracking under heterogeneous networked. To track a face in the video image we use the skin color information and connected components. In terms of parallelism we choose the master-slave model which has thread for each processes, master and slaves, The threads are responsible for real computation in each process. By placing queues between the threads we give flexibility of data flowing