• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.2
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• pp.100-107
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• 2011

As the use of mobile multimedia devices is increasing in the recent year, the needs for high-performance multimedia processors are increasing. In this regard, we propose a SIMD (Single Instruction Multiple Data) based parallel processor that supports high-performance multimedia applications with low energy consumption. The proposed parallel processor consists of 16 processing elements(PEs) and operates on a 3-stage pipelining. Experimental results for the JPEG encoding algorithm indicate that the proposed parallel processor outperforms conventional parallel processors in terms of performance and energy efficiency. In addition, the proposed parallel processor architecture was developed and verified with verilog HDL and a FPGA prototype system.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.30 no.10 s.253
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• pp.1320-1327
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• 2006

Parallel procedure and performance of two-step Eulerian code have not been reported sufficiently yet even though it was developed and utilized widely in the impact simulation. In this study, parallel strategy of two-step Eulerian code was proposed and described in detail. The performance was evaluated in the self-made linux cluster computer. Compared with commercial code, a relatively good performance is achieved. Through the performance evaluation of each computation stage, remap is turned out to be the most time consuming part among the other part such as FE processing, communication, time marching etc.

• Journal of the Korean Mathematical Society
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• v.49 no.4
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• pp.805-827
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• 2012

In this paper, we first study convergence of a special type of multisplitting methods with preweighting, and then we provide some comparison results of those multisplitting methods. Next, we propose both parallel implementation of an SOR-like multisplitting method with preweighting and an application of the SOR-like multisplitting method with preweighting to a parallel preconditioner of Krylov subspace method. Lastly, we provide parallel performance results of both the SOR-like multisplitting method with preweighting and Krylov subspace method with the parallel preconditioner to evaluate parallel efficiency of the proposed methods.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.352-354
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• 2004

In this paper, a parallel fuzzy controller for one degree of freedom magnetic levitation is designed and its performance is compared with the performance of a PID controller. Input, output scaling factor of fuzzy controller and gain of PID controller were tuned using the GA algorithm. The designed controllers are validated by numerical simulations. So it's shown that parallel fuzzy controller can give the better performance for the plant than PID controller.

• IEMEK Journal of Embedded Systems and Applications
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• v.6 no.5
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• pp.287-293
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• 2011

As chip multiprocessors have been widely adopted in embedded systems, achieving both high performance and low power consumptions of parallel applications becomes challenging. In order to meet these requirements, it is crucial for developers to analyze the performance and energy consumption of parallel applications. In this paper, we propose a tool for profiling and optimizing the performance and energy consumption of OpenMP applications (energy PROfiler and analyzer for OpenMP: ePRO-OMP). The main advantage of ePRO-OMP is that it can analyze both the performance and energy consumption of each parallel region of an OpenMP application, which can help developers find the bottleneck of parallel applications in detail.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.655-658
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• 1999

In this paper, Parallel operation of two DC-DC converters which we have ever done before need two CTs to do load current sharing. However, we have proposed a new method called ZCT method that can share load current with only a CT as doing parallel operation two converters with same converter capacity. To confirm parallel performance by a proposed DC-DC converter parallel operation method, we have done computer simulation and experiment. It is certain that we have showed to achieve two converters current sharing performance efficiently through simulation and experiment at result.

• Industrial Engineering and Management Systems
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• v.4 no.2
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• pp.117-122
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• 2005

An assembly system (AS), a valuable tool for mass production, is generally composed of a number of workstations and a transport system. While the workstations perform some preplanned operations, the transport system moves the assemblies by special designed pallets from one station to another. One common problem associated with automatic assembly systems is that some assembly operations may have relatively long cycle times. As a consequence, the productivity, as determined by the operations with the longest cycle time, can be reduced significantly. Therefore, special forms of parallel workstations were developed to improve the performance of an assembly system. In this paper, three most commonly used parallel stations: on-line, off-line and tunnel-gated stations in a free transfer assembly system are studied via discrete event simulation. Our findings revealed that the off-line parallel system has the best performance because the two independent parallel stations can lower the buffer requirement; reduce the sensitivity to variability of processing time and balance of a line. On-line parallel systems were found to have a relatively poor performance, because the operations of two parallel stations block each other, and higher buffer capacity is required to achieve similar capacity. The tunnel-gated system was more efficient than the on-line system since the first parallel station can operate independently. More importantly, we have quantified the productivity of the three different strategies mentioned. Engineers can choose the optimal strategies for installing parallel stations under their working environment.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.5
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• pp.488-495
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• 2009

This paper presents a fast feature extraction method for autonomous mobile robots utilizing parallel processing and based on OpenMP, SSE (Streaming SIMD Extension) and CUDA programming. In the first step on CPU version, the algorithms and codes are optimized and then implemented by parallel processing. The parallel algorithms are debugged to maintain the same level of performance and the process for extracting key points and obtaining dominant orientation with respect to key points is parallelized. After extraction, a parallel descriptor via SSE instructions is constructed. And the GPU version also implemented by parallel processing using CUDA based on the SIFT. The GPU-Parallel descriptor achieves an acceleration up to five times compared with the CPU-Parallel descriptor, but it shows the lower performance than CPU version. CPU version also speed-up the four and half times compared with the original SIFT while maintaining robust performance.

• Journal of Korea Spatial Information System Society
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• v.7 no.2 s.14
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• pp.81-89
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• 2005

Declustering and parallel index structures are important research areas to improve a performance of databases. Previous researches proposed several distribution schemes for parallel R-trees, however there is no search schemes to be suitable for the index. In this paper, we propose schemes to improve the performance of range queries for distribute parallel indexes. The proposed schemes use the features that a parallel disk can read multiple nodes from various disks. The proposed schemes are verified using various implementations and performance evaluations. We propose new schemes which can read multiple nodes from multiple disks in contrast that to the previous schemes which can read a node from disk. The experimental evaluation shows that the proposed schemes give us the performance improvement by 40% from the previous researches.

• International Journal of Internet, Broadcasting and Communication
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• v.11 no.3
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• pp.1-7
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• 2019

Previously, parallel computing was mainly used in areas requiring high computing performance, but nowadays, multicore CPUs and GPUs have become widespread, and parallel programming advantages can be obtained even in a PC environment. Various parallel programming frameworks using multicore CPUs such as OpenMP and PPL have been announced. Nvidia and AMD have developed parallel programming platforms and APIs for program developers to take advantage of multicore GPUs on their graphics cards. In this paper, we develop digital image transformation programs that runs on each of the major parallel programming frameworks, and measure the execution time. We analyze the characteristics of each framework through the execution time comparison. Also a constant K indicating the ratio of program execution time between different parallel computing environments is presented. Using this, it is possible to predict rough execution time without implementing a parallel program.