• 제목/요약/키워드: Parallel Machine

검색결과 506건 처리시간 0.027초

병렬기계로 구성된 인쇄회로기판 제조공정에서의 스케쥴링에 관한 연구 (Unrelated Parallel Machine Scheduling for PCB Manufacturing)

  • 김대철
    • 산업경영시스템학회지
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    • 제27권4호
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    • pp.141-146
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    • 2004
  • This research considers the problem of scheduling jobs on unrelated parallel machines with a common due date. The objective is to minimize the total absolute deviation of job completion times about the common due date. This problem is motivated by the fact that a certain phase of printed circuit board manufacturing and other production systems is bottleneck and the processing speeds of parallel machines in this phase are different for each job. A zero-one integer programming formulation is presented and two dominance properties are proved. By these dominance properties, it is shown that the problem is reduced to asymmetric assignment problem and is solvable in polynomial time.

트레이닝 데이터 감소를 위한 병렬 평면 기반의 Support Vector Machine (Support Vector Machine Using Parallel Hyperplane for Reduction of Training Data)

  • 이태호;김민우;이병준;김경태;윤희용
    • 한국컴퓨터정보학회:학술대회논문집
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    • 한국컴퓨터정보학회 2019년도 제60차 하계학술대회논문집 27권2호
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    • pp.115-116
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    • 2019
  • SVM (Support Vector Machine)은 견고성으로 인해 다양한 분류 문제에 적용 할 수 있는 효율적인 기계 학습 기술이다. 그러나 훈련 데이터의 수가 증가함에 따라 시간 복잡도가 급격히 증가하므로 대규모 데이터 세트의 경우 SVM이 비실용적이다. 본 논문에서는 SVM을 사용하여 중복 된 학습 데이터를 효율적으로 제거하는 새로운 병렬 평면(Parallel Hyperplane) 기법을 소개한다. 제안 기법에서 PH는 재귀 적으로 형성되는 반면 PH의 외부에 있는 데이터 포인트의 클러스터는 매 반복마다 제거된다. 시뮬레이션 결과 제안 기법은 기존의 클러스터링 기반 감축 기법과 SMO 기법에 비해 학습 시간을 크게 단축시키면서 데이터 축소 없이 분류의 정확성을 높일 수 있음을 확인 하였다.

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병렬 컴퓨터 “KAPAC”의 설계 및 구현 (Design and Implementation of a Parallel Computer "KAPAC")

  • 성동수;강휘삼;최승욱;박규호
    • 전자공학회논문지B
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    • 제29B권4호
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    • pp.1-11
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    • 1992
  • 트랜스퓨터를 근간으로 하는 병렬컴퓨터 "KAPAC(Kaist PArallel Computer)"을 설계하고 구현하였다. KAPAC의 목적은 복잡하거나 많은 계산이 요구되는 일을 병렬로 처리하여 속도 향상을 시킴으로써 실시간 처리및 고성능 처리를 하는 많은 응용분야에 대한 계산능력을 제공하기 위함이다. KAPAC은 UNIX 컴퓨터를 Host로 하고 VME bus에 연결할 수 있는 후위 컴퓨터로 구현하였다. 구현된 병렬 컴퓨터는 32개의 처리소자를 가지고 있는 메세지 패싱 타입의 컴퓨터이며 크로스바 스위치를 사용하여 프로그램에 의해 쉽게 연결망 형태를 구성 할 수 있도록 하였다. 구현된 병렬 컴퓨터 "KAPAC"의 재구성 특성을 보기 위하여 구성할 수 있는 다양한 연결망들을 소개했으며 몇개의 응용 프로그램들이 각기 다른 상호 연결 위상에서 수행되었다.

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병렬 운동 기구의 미끄럼 볼 조인트 개발에 관한 연구 (A Study on the Sliding Ball Joint of Parallel Kinematic Mechanism)

  • 유대원;이재학
    • 대한기계학회논문집A
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    • 제33권9호
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    • pp.982-989
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    • 2009
  • Parallel Kinematic Mechanism (PKM) is a device to perform the various motion in three-dimensional space and it calls for six degree of freedom. For example, Parallel Kinematic Mechanism is applied to machine tools, medical equipments, MEMS, virtual reality devices and flight motion simulators. Recently, many companies have tried to develop new Parallel Kinematic Mechanism in order to improve the cycle time and the precisional tolerance. Parallel Kinematic Mechanism uses general universal joint and spherical joint, but such joints have accumulated tolerance problems. Therefore, it causes position control problem and dramatically life time reduction. This paper focused on the rolling element to improve sliding precision in new sliding ball joint development. Before the final design and production, it was confirmed that new sliding ball joint held a higher load and a good geometrical structure. FEM analysis showed a favorable agreement with tensile and compressive testing results by universal testing machine. In conclusions, a new sliding ball joint has been developed to solve a problem of accumulated tolerance and verified using tensile and compressive testing as well as FEM analysis.

대규모 병렬기계 흐름생산의 재일정계획 (A production rescheduling system for a large size parallel machine flow shop)

  • 정남기;유철수;김종민;최정길
    • 산업공학
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    • 제9권2호
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    • pp.75-82
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    • 1996
  • A scheduling system is developed for a parallel machine flow shop which reflects the situations of the manufacturing processes in the tire industry. The schedule is generated via simulation using heuristic rules to get satisfaction on such constraints as due dates, demands, work-in-process, process capacity, set-up times and scheduling speed. This system, constructed with relational DB, SQL and C language, consumes less than 10 minutes of PC simulation to handle real size problems.

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가용시간이 서로 다른 병렬기계 스케줄링 문제에 대한 PTAS (A PTAS for nonsimultaneous parallel machine scheduling)

  • 황학진
    • 한국경영과학회:학술대회논문집
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    • 한국경영과학회/대한산업공학회 2003년도 춘계공동학술대회
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    • pp.145-150
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    • 2003
  • The parallel machine scheduling problem or assigning n jobs on m identical machines with the objective of minimizing makespan is considered. In this note, we apply the PTAS (Polynomial Time Approximation Scheme) or Hochbaum and Shmoys to our problem and show that it is still a PTAS for our problem.

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주어진 구간내의 기계에서만 생산 가능한 병렬기계문제에 대한 2-근사 알고리듬 (2-Approximation Algorithm for Parallel Machine Scheduling with Consecutive Eligibility)

  • 황학진;김규태
    • 대한산업공학회지
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    • 제29권3호
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    • pp.190-196
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    • 2003
  • We consider the problem of scheduling n jobs on m machines with the objective of minimizing makespan. Each job cannot be eligible to all the machines but to its consecutively eligible set of machines. For this problem, a 2-approximation algorithm, MFFH, is developed. In addition, an example is presented to show the tightness of the algorithm.

이종병렬기계생산의 일정계획지원 시스템 (A Scheduling Support System for Non-identical Parallel Machine Lines)

  • 정남기;정민영
    • 경영과학
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    • 제17권2호
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    • pp.67-73
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    • 2000
  • This paper describes a scheduling support system for a plant where the machine environment may be modeled as non-identical parallel machine lines (NPML). That is, there are a number of stages in series with various different-capability-machines at each stage. Arriving continuously are jobs with their specific due dates, processing times and candidate processing machines. We’ve developed a real-time scheduling module in conjunction with a supporting production information system which supplies necessary data to the module. This scheduling module is one of the 9 modules in this system, and is composed of both a scheduling interface and a production monitoring interface. This module allows users to generate many candidate schedules by selecting their business policies. The selective arguments which are available consist of allocation costs, batch sizes and machine selection intervals. They are now being implemented at a powder metallurgy plant.

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설비 및 품질 데이터 연계 지능형 생산계획 스케줄링 모델 개발을 위한 시스템엔지니어링 접근 방법 (Systems Engineering Approach to Develop Intelligent Production Planning Scheduling Model linked to Machine and Quality Data)

  • 박종희;김진영;홍대근
    • 시스템엔지니어링학술지
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    • 제17권2호
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    • pp.1-8
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    • 2021
  • This study proposes a systems engineering approach for the development of an advanced planning & scheduling (APS) system for a cosmetic case manufacturing factory. The APS system makes production plans and schedules based on the injection process, which consists of 27 plastic injection machines in parallel to control recommended inventory of products. The system uses machine operation/failure information and defective product/work-in-process tracking information to support intelligent scheduling. Furthermore, a genetic algorithm model is applied to handle the complexity of heuristic rules and machine/quality constraints in this process. As a result of the development, the recommended inventory compliance rate is improved by scheduling the 30-day production plan for 15 main products.

대규모 신경망 시뮬레이션을 위한 칩상 학습가능한 단일칩 다중 프로세서의 구현 (Design of a Dingle-chip Multiprocessor with On-chip Learning for Large Scale Neural Network Simulation)

  • 김종문;송윤선;김명원
    • 전자공학회논문지B
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    • 제33B권2호
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    • pp.149-158
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    • 1996
  • In this paper we describe designing and implementing a digital neural chip and a parallel neural machine for simulating large scale neural netsorks. The chip is a single-chip multiprocessor which has four digiral neural processors (DNP-II) of the same architecture. Each DNP-II has program memory and data memory, and the chip operates in MIMD (multi-instruction, multi-data) parallel processor. The DNP-II has the instruction set tailored to neural computation. Which can be sed to effectively simulate various neural network models including on-chip learning. The DNP-II facilitates four-way data-driven communication supporting the extensibility of parallel systems. The parallel neural machine consists of a host computer, processor boards, a buffer board and an interface board. Each processor board consists of 8*8 array of DNP-II(equivalently 2*2 neural chips). Each processor board acn be built including linear array, 2-D mesh and 2-D torus. This flexibility supports efficiency of mapping from neural network models into parallel strucgure. The neural system accomplishes the performance of maximum 40 GCPS(giga connection per second) with 16 processor boards.

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