• The Journal of the Acoustical Society of Korea
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• v.41 no.3
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• pp.351-358
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• 2022

Recently, Generative Adversarial Networks (GAN) and Variational AutoEncoders (VAE) have been applied to voice conversion that can make use of non-parallel training data. Especially, Conditional Cycle-Consistent Generative Adversarial Networks (CC-GAN) and Cycle-Consistent Variational AutoEncoders (CycleVAE) show promising results in many-to-many voice conversion among multiple speakers. However, the number of speakers has been relatively small in the conventional voice conversion studies using the CC-GANs and the CycleVAEs. In this paper, we extend the number of speakers to 100, and analyze the performances of the many-to-many voice conversion methods experimentally. It has been found through the experiments that the CC-GAN shows 4.5 % less Mel-Cepstral Distortion (MCD) for a small number of speakers, whereas the CycleVAE shows 12.7 % less MCD in a limited training time for a large number of speakers.

• Journal of Practical Engineering Education
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• v.15 no.2
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• pp.259-271
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• 2023

The purpose of this study is to prepare a plan to activate vocational training through a company-customized qualification system that meets the needs of the industry and responds promptly to changes in the external environment and trends. The BRIDGE 3.0 model was presented as Establishment of qualification system based on education and training result certification, a customized qualification operation system based on local companies by setting the qualification system as a strategy centered on companies that are consumers. To this end, the current status and limitations of vocational competency development projects, the current status and limitations of the domestic qualification system, government policies related to vocational competency development, FGI of corporate personnel managers, surveys of personnel managers of SME, expert advice.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.47 no.5
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• pp.50-60
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• 2010

For the last half a century, the personal computer and software industries have been prosperous due to the incessant evolution of computer systems. In the 21st century, the embedded system market has greatly increased as the market shifted to the mobile gadget field. While a lot of multimedia gadgets such as mobile phone, navigation system, PMP, etc. are pouring into the market, most industrial control systems still rely on 8-bit micro-controllers and simple application software techniques. Unfortunately, the technological barrier which requires additional investment and higher quality manpower to overcome, and the business risks which come from the uncertainty of the market growth and the competitiveness of the resulting products have prevented the companies in the industry from taking advantage of such fancy technologies. However, high performance, low-power and low-cost hardware and software platforms will enable their high-technology products to be developed and recognized by potential clients in the future. This paper presents such a platform for industrial embedded systems. The platform was designed based on Telechips TCC8300 multimedia processor which embedded a variety of parallel hardware for the implementation of multimedia functions. And open-source Embedded Linux, TinyX and GTK+ are used for implementation of GUI to minimize technology costs. In order to estimate the expected performance and power consumption, the performance improvement and the power consumption due to each of enabled hardware sub-systems including YUV2RGB frame converter are measured. An analytic model was devised to check the feasibility of a new application and trade off its performance and power consumption. The validity of the model has been confirmed by implementing a real target system. The cost can be further mitigated by using the hardware parts which are being used for mass production products mostly in the cell-phone market.

• Journal of the Korean earth science society
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• v.43 no.6
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• pp.691-711
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• 2022

The state-of-the-art Earth system model as a virtual Earth is required for studies of current and future climate change or climate crises. This complex numerical model can account for almost all human activities and natural phenomena affecting the atmosphere of Earth. The Unified Model (UM) from the United Kingdom Meteorological Office (UK Met Office) is among the best Earth system models as a scientific tool for studying the atmosphere. However, owing to the expansive numerical integration cost and substantial output size required to maintain the UM, individual research groups have had to rely only on supercomputers. The limitations of computer resources, especially the computer environment being blocked from outside network connections, reduce the efficiency and effectiveness of conducting research using the model, as well as improving the component codes. Therefore, this study has presented detailed guidance for installing a new version of the UM on high-performance parallel computers (Linux clusters) owned by individual researchers, which would help researchers to easily work with the UM. The numerical integration performance of the UM on Linux clusters was also evaluated for two different model resolutions, namely N96L85 (1.875° ×1.25° with 85 vertical levels up to 85 km) and N48L70 (3.75° ×2.5° with 70 vertical levels up to 80 km). The one-month integration times using 256 cores for the AMIP and CMIP simulations of N96L85 resolution were 169 and 205 min, respectively. The one-month integration time for an N48L70 AMIP run using 252 cores was 33 min. Simulated results on 2-m surface temperature and precipitation intensity were compared with ERA5 re-analysis data. The spatial distributions of the simulated results were qualitatively compared to those of ERA5 in terms of spatial distribution, despite the quantitative differences caused by different resolutions and atmosphere-ocean coupling. In conclusion, this study has confirmed that UM can be successfully installed and used in high-performance Linux clusters.

• The Transactions of the Korea Information Processing Society
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• v.3 no.7
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• pp.1924-1937
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• 1996

In this paper, we propose a ESP(Extended Scan Path) architecture for multi- board testing. The conventional architectures for board testing are single scan path and multi-scan path. In the single scan path architecture, the scan path for test data is just one chain. If the scan path is faulty due to short or open, the test data is not valid. In the multi-scan path architecture, there are additional signals in multi-board testing. So conventional architectures are not adopted to multi-board testing. In the case of the ESP architecture, even though scan paths either short or open, it doesn't affect remaining other scan paths. As a result of executing parallel BIST and IEEE 1149.1 boundary scan test by using, he proposed ESP architecture, we observed to the test time is short compared with the single scan path architecture. Because the ESP architecture uses the common bus, there are not additional signals in multi-board testing. By comparing the ESP architecture with conventional one using ISCAS '85 bench mark circuit, we showed that the architecture has improved results.

• Asian Pacific Journal of Cancer Prevention
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• v.14 no.12
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• pp.7621-7628
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• 2013

Human epidermal growth factor receptor (HER) status is an important prognostic factor in breast cancer. There is no globally accepted method for determining its status, and which method is most precise is still a matter of debate. We here analyzed HER2 mRNA expression by quantitative reverse transcription-PCR (qRT-PCR) and HER2 DNA amplification using multiplex ligation-dependent probe amplification (MLPA). In parallel, we performed a routine evaluation of HER2 protein by immunohistochemistry (IHC). To assess the accuracy of the RT-PCR and MLPA techniques, a combination of IHC and fluorescence in situ hybridization (FISH) was used, substituting FISH when the results of IHC were ambiguous (2+) and for those IHC results that disagreed with MLPA and qRT-PCR, this approach being termed IHC-FISH. The IHC results for four samples were not compatible with the MLPA and qRT-PCR results; the MLPA and qRT-PCR results for these samples were confirmed by FISH. The correlations between IHC-FISH and qRT-PCR or MLPA were 0.945 and 0.973, respectively. The ASCO/CAP guideline IHC/FISH correlation with MLPA was (0.827) and with RT-PCR was (0.854). The correlations between the IHC results (0, 1+ as negative, and 3+ as positive) and qRT-PCR and MLPA techniques were 0.743 and 0.831, respectively. Given the shortcomings of IHC analysis and greater correlations between MLPA, qRT-PCR, and FISH methods than IHC analysis alone with each of these three methods, we propose that MLPA and real-time PCR are good alternatives to IHC. However a suitable cut-off point for qRTPCR is a prerequisite for determining the exact status of HER2.

• Journal of the Korean Magnetics Society
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• v.17 no.2
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• pp.60-64
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• 2007

Ba-Ferrite single crystals were prepared and characterized by X-ray, SEM and Mossbauer spectroscopy. The single crystal layers was cut in the c-axis and radiated to the surface by ${\gamma}-rays$ for Mossbauer spectroscopy. We found out that the spin states in Fe atoms were parallel to the ${\gamma}-rays$ direction. The temperature dependence of the hyperfine field is almost similar to that of powder samples. The crystal structure is a Magnetoplumbite without any other phases and the lattice parameters are found out with $a_0=5.892{\AA},\;b_0=5.892{\AA},\;c_0=23.198{\AA}$. $M\"{o}ssbauer$ spectrum in single crystal have 5 sets off absorption lines in each Fe site when the ${\gamma}-rays$ have the same radiation direction with the c-axis in the crystal, which mean that the whole crystal bulk formed only one crystal and same spin direction. The hysteresis curve shows the saturation moment and coercive force of 70.71 emu/g and 320 Oe respectively.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.38 no.5
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• pp.16-26
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• 2001

In this paper, we present a new scheduling method called CDSS(Carried-Dependence Self-Scheduling) for efficiently execution of the loop with intra dependency between iterations based on the central queue. We also implemented it on shared memory system using Java language. Also, we study the modification that converts the existing self-scheduling method based on the central task queue for parallel loops onto the same form applied to loop with loop-carried dependences. The proposed method is self scheduling and assigns the loops in three-level considering the synchronization point according to the dependence distance of the loops. To adapt the proposed scheme and modified methods into various platforms, including a uni-processor system, we use threads for implementation. Compared to other assignment algorithms with various changes of application and system parameters, CDSS is found to be more efficient than other methods in overall execution time including scheduling overheads. CDSS shows improved performance over modified SS, Factoring, GSS and CSS by about 0.02, 40.5, 46.1 and 53.6%, respectively. In CDSS, we achieve the best performance on varying application programs using a few threads, which equal the dependence distance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.8
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• pp.33-44
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• 2011

In this paper, we presents a hybrid on-chip bus architecture based on the AMBA 3.0 AXI protocol for MPSoC with high performance and low power. Among AXI channels, data channels with a lot of traffic are designed by crossbar-switch architecture for massively parallel processing. On the other hand, addressing and write-response channels having a few of traffic is handled by shared-bus architecture due to the overheads of (areas, interconnection wires and power consumption) reduction. In experiments, the comparisons are carried out in terms of time, space and power domains for the verification of proposed hybrid on-chip bus architecture. For $16{\times}16$ bus configuration, the hybrid on-chip bus architecture has almost similar performance in time domain with respect to crossbar on-chip bus architecture, as the masters's latency is differenced about 9% and the total execution time is only about 4%. Furthermore, the hybrid on-chip bus architecture is very effective on the overhead reduction, such as it reduced about 47% of areas, and about 52% of interconnection wires, as well as about 66% of dynamic power consumption. Thus, the presented hybrid on-chip bus architecture is shown to be very effective for the MPSoC interconnection design aiming at high performance and low power.

• Journal of KIISE:Computing Practices and Letters
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• v.6 no.2
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• pp.120-134
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• 2000

In this paper we present a Distributed Object oriented Virtual computing Environment, called DOVE which consists of autonomous distributed objects interacting with one another via method invocations based on a distributed object model. DOVE appears to a user logically as a single virtual computer for a set of heterogeneous hosts connected by a network as if objects in remote site reside in one virtual computer. By supporting efficient parallelism, heterogeneity, group communication, single global name service and fault-tolerance, it provides a transparent and easy-to-use programming environment for parallel applications. Efficient parallelism is supported by diverse remote method invocation, multiple method invocation for object group, multi-threaded architecture and synchronization schemes. Heterogeneity is achieved by automatic data arshalling and unmarshalling, and an easy-to-use and transparent programming environment is provided by stub and skeleton objects generated by DOVE IDL compiler, object life control and naming service of object manager. Autonomy of distributed objects, multi-layered architecture and decentralized approaches in hierarchical naming service and object management make DOVE more extensible and scalable. Also,fault tolerance is provided by fault detection in object using a timeout mechanism, and fault notification using asynchronous exception handling methods