• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.63-69
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• 2012

As decreasing size of chips, the need of wafer level packaging is increased in semi-conductor and display industries. Temperature uniformity is a crucial factor in vacuum soldering process to guarantee quality of bonding between chips and wafer. In this paper, a stepwise iterative algorithm has been suggested to obtain output profile of each heat source. Since this algorithm is based on open-loop stepwise iterative experimental technique, it is easier to implement and cost effective than real time feedback controls. Along with some experiments, it was shown that the suggested algorithm can remarkably improve temperature uniformity of wafer during whole heating process compared with the ordinary manual trial-and error method.

• Korean Journal of Computational Design and Engineering
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• v.22 no.2
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• pp.181-189
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• 2017

In this paper, we develop a human error-free wire connection guide system. The only related work is Japanese patent by Hitachi. The patent is guiding the wire connection using PC server. And no implementation details have been reported publicly. We propose a new method based on smart mobile devices. The proposed methods are registered as two Korean patents. We implement a prototype wire connection guide system to verify the patents. Through human experiments, we verify the system can reduce the human error more than 90% and speed up the connection process more than twice faster than working without the system. To be used in the industrial fields, the prototype system needs more product packaging works.

• Journal of Advanced Marine Engineering and Technology
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• v.29 no.4
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• pp.436-442
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• 2005

Rapid development of electronic technology requires small size, high density packaging and high power of electronic devices. In this paper, characteristics on oscillating heat pipe according to operating conditions (environment temperature, charging ratio of working fluid, inclination) based on experimental study was investigated From the experimental results $25^{\circ}C$(environment temperature) R-141b (working fluid) $40\%$ (charging ratio) was best performace at others of inclination angle and the top heating mode of OCHP performed $80\%$ efficiency of the bottom heating mode.

• Journal of the Korean Society of Mechanical Technology
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• v.13 no.4
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• pp.93-99
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• 2011

This paper presents a new type of optical silicon accelerometer using deep reactive ion etching (DRIE) and micro-stereolithography technology. Optical silicon accelerometer is based on a mass suspended by four vertical beams. A vertical shutter at the end of the mass can only moves along the sensing axis in the optical path between two single-mode optical fibers. The shutter modulates intensity of light from a laser diode reaching a photo detector. With the DRIE technique for (100) silicon, it is possible to etch a vertical shutter and beam. This ensures low sensitivity to accelerations that are not along the sensing axis. The microstructure for sensor packaging and optical fiber fixing was fabricated using micro stereolithography technology. Designed sensors are two types and each resonant frequency is about 15 kHz and 5 kHz.

• International journal of advanced smart convergence
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• v.8 no.3
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• pp.39-45
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• 2019

This paper presents an optical technique for the three-dimensional (3D) shape inspection of micro solder balls used in ball-grid array (BGA) packaging. The proposed technique uses an optical source composed of spatially arranged light-emitting diodes (LEDs) and the results are derived based on the specular reflection characteristics of the micro solder balls for BGA A vision system comprising a camera and LEDs is designed to capture the reflected images of multiple solder balls arranged arbitrarily on a tray and the locations of the LED point-light-source reflections in each ball are determined via image processing, for shape inspection. The proposed methodology aims to determine the presence of defects in 3D BGA shape using the statistical information of the relative positions of multiple BGA balls, which are included in the image. The presence of the BGA balls with large deviations in relative position imply the inconsistencies in their shape. Experiments were conducted to verify that the proposed method could be applied to inspection without sophisticated mechanism and productivity problem.

• Composites Research
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• v.37 no.3
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• pp.143-149
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• 2024

This paper measures the mechanical properties of corrugated cardboard, an eco-friendly packaging material, and applies these measurements to the MAT_PAPER model in LS-DYNA for finite element analysis. Although MAT_PAPER is primarily designed for modeling the behavior of paper, this research demonstrates its applicability to corrugated cardboard as well. Tensile, compression, and shear behaviors of a corrugated cardboard were measured and analyzed, and based on these results, six yield surfaces were derived and integrated into the MAT_PAPER model. By comparing the finite element analysis of the material tests and the low velocity collapse analysis of the corrugated cardboard square boxes with each experimental results, it was shown that the behavior of corrugated cardboard could be equivalently considered well by the MAT_PAPER model. However, since the model is not rate-dependent, the high strain rate properties of liner materials were measured and used for strain rate correction. Consequently, this matches well with the results of the high-speed compression tests of the corrugated cardboard square boxes.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.57-62
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• 2012

In this paper, numerical analysis by finite element method, parameter design by the Taguchi method and ANOVA method were used to analyze about effect of design deviations and thickness variations on warpage of FCCSP substrate. Based on the computed results, it was known that core material in substrate was the most determining deviation for reducing warpage. Solder resist, prepreg and circuit layer were insignificant effect on warpage relatively. But these results meant not thickness effect was little importance but mechanical properties of core material were very effective. Warpage decreased as Solder resist and circuit layer thickness decreased but effect of prepreg thickness was conversely. Also, these results showed substrate warpage would be increased to maximum 40% as thickness deviation combination. It meant warpage was affected by thickness tolerance under manufacturing process even if it were met quality requirements. Threfore, it was strongly recommended that substrate thickness deviation should be optimized and controlled precisely to reduce warpage in manufacturing process.

• Journal of the Microelectronics and Packaging Society
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• v.8 no.4
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• pp.35-41
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• 2001

In this paper, several methods to predict the solder joint shape are studied. Although there are various methods to predict the solder joint shape, such as truncated sphere method. force-balanced analytical solution, and energy-based methods like surface evolver developed by Ken Brakke, we calculate solder joint shape of $\mu$BGA by two solder joint shape prediction methods(truncated sphere method and surfaceevolver) and then compare results of each method. The results indicate that two methods can accurately predict the solder Joint shape in an accurate range. After that, we calculate reliability solder joint shape under thermal cycle test by FEA program ANSYS(version 5.62). As a result, it could be found that optimal solder joint shape calculated by solder joint prediction method has best reliability in thermal cycle test.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.55-60
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• 2002

This paper presents a technique for the preparation of vertically grown CNTs by ICPHFCVD(inductively coupled plasma hot filament chemical vapor deposition) below $580^{\circ}C$. Purification of the CNTs(carbon nanotubes) using RE(radio frequency) plasma in a one step process, based on the different etching property of the Ni-tip, amorphous carbon and carbonaceous materials is also discussed. After purifying the grown materials. CNTs shown the multi walled and hollow typed structure. The typical outer and inner diameters or CNT were 50 nm and 25 nm, respectively. The graphitic wall was composed of 82 layers and the distance between wall and wall was 0.34 nm. From the results of TEM observation, the Ni catalyst at the tip of the carbon nanotubes were effectively removed by using a RF plasma etching, continuously.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.3
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• pp.31-35
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• 2016

This paper demonstrates the successful application of yttria-stabilized zirconia thin films deposited by atomic layer deposition to the anode-side interlayer for cerium oxide electrolyte based solid oxide fuel cell. At the operating temperature over $500^{\circ}C$, the electrical conductivity of cerium oxide electrolyte is known to dramatically increase and, therefore, the open circuit voltage of the cell decreases leading to the decrease of the performance. Ultra-thin (60 nm) atomic layer deposited yttria-stabilized zirconia thin film in this study conformally coated the anode-side surface of the cerium oxide electrolyte and efficiently blocked the electrical conduction through the electrolyte. Accordingly, the open circuit voltage increased by up to 20%, and the maximum power density increased by 52% at $500^{\circ}C$