Browse > Article
http://dx.doi.org/10.6117/kmeps.2012.19.3.057

Numerical Analysis on the Design Variables and Thickness Deviation Effects on Warpage of Substrate for FCCSP  

Cho, Seunghyun (Dept. of Mechanical engineering, Dongyang Mirae University)
Jung, Hunil (LG Innotek Co., LTD.)
Bae, Onecheol (SAMSUNG Electronics Co., LTD.)
Publication Information
Journal of the Microelectronics and Packaging Society / v.19, no.3, 2012 , pp. 57-62 More about this Journal
Abstract
In this paper, numerical analysis by finite element method, parameter design by the Taguchi method and ANOVA method were used to analyze about effect of design deviations and thickness variations on warpage of FCCSP substrate. Based on the computed results, it was known that core material in substrate was the most determining deviation for reducing warpage. Solder resist, prepreg and circuit layer were insignificant effect on warpage relatively. But these results meant not thickness effect was little importance but mechanical properties of core material were very effective. Warpage decreased as Solder resist and circuit layer thickness decreased but effect of prepreg thickness was conversely. Also, these results showed substrate warpage would be increased to maximum 40% as thickness deviation combination. It meant warpage was affected by thickness tolerance under manufacturing process even if it were met quality requirements. Threfore, it was strongly recommended that substrate thickness deviation should be optimized and controlled precisely to reduce warpage in manufacturing process.
Keywords
FCCSP; Substrate; Warpage; Deviation; Taguchi; FEM;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Mario A. Bolanos, "Semiconductor IC Packaging Technology Challenges:The Next Five Years", SPAY025, Texas Instruments.
2 X. J. Fan, et al., "Design and optimization of thermo-mechanical reliability in wafer level packaging" Microelectronics reliab., 50(4), 536 (2010).   DOI
3 Ming-Yi Tsi, et al., "Investgation of thermomechanical behaviors of flip chip BGA packages during manufacuring process and thermal cycling", IEEE Trans. Compon. Pack. -Technol. 27(3), 568 (2004).   DOI   ScienceOn
4 Darveaux et al., "Reliability of Plastic Ball Grid Array Assembly", Ball Grid Array Technology, McGraw-Hill, New York (1995).
5 Lau et al., "Electronic Packaging: Design, Materials, Process, and Reliability" McGraw-Hill, New York (1997).
6 Zhang Wenge, et al., "The effects of underfill epoxy on warpage in flip-chip assembles", IEEE Trans. Compon. Pack. Manufact.Technol - Part A, 21(2), 323 (1998).   DOI
7 R. Darveaux, C. Reichman, N. Islam, "Interface Failure in Lead Free Solder Joints", Proc. 56th Electronic Components and Technology Conference(ECTC) (2006).
8 Seunghyun Cho, et al., "Estimation of warpage and thermal stress of IVHs in flip-chip ball grid arrays package by FEM", Microelectron Reliab., 48, 300 (2008).   DOI   ScienceOn
9 Lau John H, et al., "Effects of Build-Up Printed Circuit Board Thickness in the Solder Joint Reliability of a Wafer Level Chip Scale Package(WLCSP)", Trans. Comp. Packag. Technol., 25(1), 3 (2002).   DOI
10 Elva Lin, et al., "Advantage and challenge of coreless Flipchip BGA Microsystems", IMPACT, pp.346 (2007).
11 Chiu Christine, et al., "Challenges of thin core PCB Flip Chip package on advanced Si Nodes", Proc. 57th Electronic Components and Technology Conference(ECTC) (2007).
12 Cho et al., "New dummy design and stiffener on warpage reduction in Ball Grid Array Printed Circuit Board", Microelectronics Reliab., 50, 242 (2010).   DOI
13 MARC 2011 user manual, Volume A : Theory and user information, (2011).
14 박성현, 현대실험계획법, 민영사, (2003).