• Title/Summary/Keyword: PSPICE

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Simulation Study of Electronic Ballast with A High Frequency Lamp Model (고주파 램프모델을 포함한 전자식 안정기의 PSPICE 시뮬레이션 연구)

  • 한수빈;박석인;정봉만;김규덕;정학근;유승원
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.62-64
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    • 1999
  • 전자식안정기 설계에 있어서 중요한 램프의 모델링의 연구이며 이 모델은 기존의 방식에서 요구되는 많은 측정값에 의한 방식과는 달리 2개의 파라메터에 의해 결정되는 장점이 있다. 또한 DSPICE로 구현이 용이하므로 시뮬레이션을 통해서 안정기 회로의 L, C값의 초기값을 선택하는데 유용한 방법이 될 수 있다.

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Intelligent Driving Circuit for IGBTs (IGBT용 지능형 구동회로)

  • 김만고;김진환;전성즙;노의철;김인동
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.214-217
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    • 1999
  • IGBT 소자는 고전류 밀도의 특성을 지니면서 구동전력이 작기 때문에 500V 이상의 고전압 응용에서 널리 이용되고 있다. 본 논문에서는 기존의 IGBT 소자의 구동회로가 갖는 기본기능 이외에 소자에 대한 보호기능과 소자의 동작 상태를 감지하기 위한 모니터링 기능을 갖는 지능형 구동회로에 대해 제안한다. 제안된 회로는 소자에 비정상적인 큰 전류가 흐를 경우 논리회로에 의해 게이트 구동전압을 일정시간 즉시 차단하여 소자를 과전류와 과열로부터 보호하고, 소자의 동작 상태가 정상인지 차단 상태인지 감지할 수 있다. 언급한 기능을 가진 구동회로가 제시되며, 제안된 회로의 동작은 Pspice를 이용한 시뮬레이션 및 실험을 통해 확인된다.

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A Study on Prediction of Conducted EMI In PWM inverter fed Induction Motor Drive System (PWM 인버터-유도전동기 구동시스템의 전도노이즈 예측에 관한 연구)

  • 이진환;안정준;원충연;김영석;최세완
    • Proceedings of the KIPE Conference
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    • 1999.07a
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    • pp.367-372
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    • 1999
  • In this paper, an inverter fed induction motor drive system is analyed in order to predict the conducted interference. High frequency model for inverter, motor and system parasitic components are proposed. High frequency component allows time and frequency domain analysis to be performed with standard PSpice tool. The overall high frequency component and model are verified by comparing simulation and experimental result.

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Electronically Tunable Current-Mode Second-Order Multifunctional Filter Using FTFNs and Dual-Output OTAs

  • Tangsrirat, Worapong;Anuntahirunrat, Kongsak;Surakampontorn, Wanlop
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.99.2-99
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    • 2001
  • An electronically tunable current-mode second-order multifunctional filter is described in this paper. The proposed filter consists of two four-terminal floating nullors (FTFNs), two dual-output OTAs and two grounded capacitors. The circuit can simultaneously realize the lowpass, bandpass and highpass current transfer functions from the same configuration without changing the circuit configuration and elements. The natural angular frequency we and the parameter wo/Q can be orthogonally controlled through adjusting the transconductance gain of OTA. PSPICE simulation results are employed to confirm the circuit performance.

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An Active-Only Voltage-Mode Integrator and Its Applications

  • Shinji, Ohyama;Kim, Doh-Hyun
    • 제어로봇시스템학회:학술대회논문집
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    • 2001.10a
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    • pp.158.4-158
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    • 2001
  • This paper presents a novel circuit configuration for realizing the continuous-time active-only voltage-mode integrator. The proposed integrator consists only of internally compensated type operational amplifier (OA) and operational transconductance amplifiers (OTAs). Since no external passive elements are required, the integrator is suitable for integrated circuit implementation in either bipolar or CMOS technologies. Moreover, the integrator gain can be electronically tuned by adjusting the bias currents of the OTAs. The characteristics of the proposed integrator and the effectiveness of the design procedure in realizing various analog transfer functions have been examined by PSPICE simulation.

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Analog Multiplier Using Translinear Current Conveyor

  • Chaikla, Amphawan;Kaewpoonsuk, Anucha;Wangwi-wattana, C.;Riewruja, Vanchai;Jaruvanawat, Anuchit
    • 제어로봇시스템학회:학술대회논문집
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    • 2002.10a
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    • pp.80.1-80
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    • 2002
  • In this article, an alternative analog multiplier circuit, using the translinear second-generation current conveyors with the external resistors. The realization method makes use of the inherited translinear loop of the current conveyor offering the positive-supply current that provides in the quartersquare algebraic identity. The proposed circuit operates in voltage mode and it achieves a high accuracy. The PSPICE simulation results confirm that the performances of the proposed multiplier circuit, such as dynamic range and accuracy, are agreed with the theoretical results.

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A study for gain-controllable precision full-wave rectifier (이득-제어 가능한 정밀 전파 정류기에 관한 연구)

  • 이주찬;박동권;차형우
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.1149-1152
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    • 1999
  • A gain controllable precision full-wave rectifier for the measurements of small-signal voltage is presented. It consists of gain controllable inverter superdiode and noninverter superdiode. The results of simulation with PSpice and experiment on breadboard show that the proposed rectifier has the characteristic of precise rectification and amplification for small signal voltage.

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Design and Implementation of modulized I/O Buffer Control System for Large Capacity Cable Check (대용량 케이블 점검을 위한 모듈형 입.출력 버퍼 제어 시스템 설계 및 구현)

  • 양종원;김대중;이상혁
    • Proceedings of the IEEK Conference
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    • 2002.06e
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    • pp.243-246
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    • 2002
  • This paper presents a study on the design and implementation of modulized I/O buffer control system for large capacity cable check. A 8bit I/O buffer basic module which has feedback loops with input and output buffers is simulated in PSpice and implemented with logic gates. This system is composed of 18 sub-boards which have 3 channels of 32bit data buses, and of a main board with MPC860 microprocessor.

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Analysis of Multi Level Current Source GTO Inverter for Induction Motor Drives

  • Arase, Takayuki;Matususe, Kouki
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.535-540
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    • 1998
  • This paper discusses a triple stage current source GTO inverter system for high power motor drives. The energy rebound circuit of the triple stage inverter not only controls the spike voltage of the GTO inverter but also facilitates PWM control of the thyristor rectifier operated at unity fundamental input power factor. Based on Pspice simulation and experiments, the principles and PWM pulse pattern for removing specific lower harmonics in the inverter's output current are discussed in detail.

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Method for PV Module Mismatch Compensation to Reduce Parallel Mismatch in Solar PV Array (태양광 PV 어레이에서 병렬 부정합을 저감시키는 모듈 부정합 보상기법)

  • Park, Gi-Yob;Ahn, Hee-Wook
    • Proceedings of the KIPE Conference
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    • 2010.07a
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    • pp.170-171
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    • 2010
  • The power loss due to PV module mismatch in PV array system is analyzed and a mismatch compensation method is proposed. A dc-dc converter is used to compensate for series mismatch caused by a low current module in a string. The converter is controlled to maximize the array power output. The proposed compensation method was verified by PSpice simulation.

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