• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.1002-1003
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• 2006

Power line communication: PLC which easy to install at anywhere near outlet for electric machine. PLC uses transmission line for voltage of which is 60 Hz. One of the important thing is the processes of adding signal to power line and extracting the signal from power line, another is to choose the strong modulation method which sends signals to long distance without loosing in PLC channel. but PLC channel have very high and variable noise and attenuation and then it is very hard to transmit optimally between the transmitter and the receiver. AWGN, impulse noise and attenuation are created. To overcome the noise and attenuation. Multi-carrier Modulation methods like as OFDM and DMT which divide the channel into many sub-channel are powerful communication methods for PLC. In this paper, PLC channels are simulated for getting BER by Matlab simulink

• Journal of Institute of Control, Robotics and Systems
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• v.11 no.4
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• pp.297-303
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• 2005

In this paper, I developed an intelligent multi agents based softPLC(IMPLC). In IMPLC, the standard IEC 1131-3 PLC languages(LD, SFC, FBD, ST) programmed by a user are converted to IL, which is one of intermediate codes, in order to make them interactions. And then the IL is converted to the standard C code regarding some extension and transplanting, which can be used in a commercial editor such as visual C++. In IMPLC, the logical errors and syntax errors occurred by users are detected, so that the optimal PC control based softPLC can be possible. IMPLC provide easy programming platform to such beginner as well as professionals. The study of code conversion is firstly tried in the world as well as KOREA. I applied IMPLC to 3 steps conveyer belt system. The simulation results say that the debugging steps by IMPLC using multi agents are decreased than the conventional softPLC's.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.19 no.3
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• pp.105-110
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• 2005

Programmable Logic Controller(PLC) is the most widely utilized among many sorts of existing controller for the design of factory automation control system, and study about a PLC language is peformed actively. In this paper, we proposed the encoding module that we increase input points when increased of the input machine which is going to control it in the FA design that used PLC. Input point is going to be extended with 2-3 points in the state that cannot equip input unit in basic base any more. Then an extension base, a power supply, an extension cable and an output nit must be equipped particularly. Then a cost must be added very much. This paper proposed the encoding module which extended an input in a small quantity, and we confirmed a feasibility through a simulation.

• Journal of Wind Energy
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• v.15 no.1
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• pp.60-68
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• 2024

In this study, a hardware-in-the-loop simulation (HILS) environment was established using MATLAB/Simulink to simulate and verify the power performance of a wind turbine. The target wind turbine was selected as the NREL 5 MW model, and modeling was performed based on the disclosed specifications. The HILS environment consists of a PC equipped with a MATLAB/Simulink program, a programmable logic controller (PLC) for uploading and linking control algorithms, and data acquisition (DAQ) equipment to manage wind turbine data input and output. The operation of the HILS environment was carried out as a procedure of operation (PC) of the target wind turbine modeled based on MATLAB/Simulink, data acquisition (PLC) of control algorithms, control command calculation (PLC), and control command input (PC). The simulation was performed using the HILS environment under turbulent wind conditions and compared with the simulation results performed under the same conditions in the HILS environment using the commercial program Bladed for performance verification. From the comparison, it was found that the dynamic simulation results of the Bladed HILS and the MATLAB HILS were close in power performances and the errors in the average values of rotor rotation speed and power generation between the two simulations were about 0.44 % and 3.3 %, respectively.

• Nuclear Engineering and Technology
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• v.53 no.1
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• pp.131-141
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• 2021

Simulation is a widely used functional verification method for FBD programs of PLC-based digital I&C system in nuclear power plants. It is difficult, however, to estimate the thoroughness (i.e., effectiveness or quality) of a simulation in the absence of any clear measure for the estimation. This paper proposes two sets of structural coverage adequacy criteria for the FBD simulation, toggle coverage and modified condition/decision coverage, which can estimate the thoroughness of simulation scenarios for FBD programs, as recommended by international standards for functional safety. We developed two supporting tools to generate numerous simulation scenarios and to measure automatically the coverages of the scenarios. The results of our experiment on five FBD programs demonstrated that the measures and tools can help software engineers estimate the thoroughness and improve the simulation scenarios quantitatively.

• Journal of information and communication convergence engineering
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• v.7 no.4
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• pp.453-458
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• 2009

This paper presents two methods of designing a Broadband Impedance Matching (BIM) circuit for maximizing a power line communication (PLC) equipment (or Modem) signal injection into its load at any power line connection port. This optimal (BIM) circuit design is achieved in two phases: Butterworth gain function and Tchebycheff gain function. According to the comparison of simulation and practical results, the performances of two gain functions on BIM are discussed.

• The Journal of the Korea institute of electronic communication sciences
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• v.6 no.3
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• pp.397-404
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• 2011

In this research, wish to suggest method to embody system that can accommodate defect of PLC and find actual propriety. Defect permission control system minimizes production damage because enables repair and checking without discontinuance and improve believability about whole system. Propose duplexing of system to embody this fault tolerant system. Therefore, composed control system that can permit defect or breakdown duplexings of various module proposing this system, and confirms to simulation and actuality kiln of defect permission control system through an application experiment, and compares for mean time between defect by estimate and defect special quality and system configuration of failure(failure) to improve believability of PLC control system together. In proposed system expression method and system mode and relation with operation mode, error discovery mode and switching tube of duplexing mode, and PLC's central processing unit of node study algorithm about master-standby conversion driving and continuous operation of 2 channels method that have 2 that is not one and deduced continuous operation method and result about defect permission in this algorithm and applies this result to actuality kiln control system and confirms continuous operation about PLC defect permission.

• Proceedings of the Korea Society for Simulation Conference
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• 2005.11a
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• pp.93-101
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• 2005

본 논문에서는 원전 계측제어시스템 구축을 위해 개발된 원전용 PLC 시뮬레이터의 설계 사항에 관해 소개한다. 원전용 계측제어시스템은 원전이라는 특수한 환경과 제약으로 말미암아, 일반적인 시뮬레이터 개발보다 엄격한 요건을 만족해야 한다. 이러한 요건에는 다양한 테스팅을 통하여 제어 프로그램의 안정성을 보장할 수 있어야 하며, 다수의 계측제어 프로그램들을 고속으로 동시에 실행할 수 있어야 한다. 본 논문에서는 이러한 문제점들을 극복하고자 PLC 제어 프로그램의 컴파일러를 제작하고, Compiled-Code 시뮬레이션 기법을 적용하여 고속으로 실행할 수 있는 시뮬레이터 생성 방안을 고안해 내었다.

• Proceedings of the KIEE Conference
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• 1999.07g
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• pp.3067-3069
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• 1999

In this paper, A bit processor for controlling sequence logic was implemented, using a FPGA. This processor consists of program memory interface. I/O interface, parts for instruction fetch and decode, registers, ALU, program counter and etc. This FPGA is able to execute sequence instruction during program fetch cycle, because of divided bus system, program bus and data bus. Also this bit processor has instructions set that 16bit or 32bit fixed width, so instruction decoding time and data memory interface time was reduced. This FPGA was synthesized by pASIC 2 SpDE and Synplify-Lite synthesis tool of Quick Logic company. The final simulation for worst cases was successfully performed under a Verilog HDL simulation environment. And the FPGA programmed for an 84 pin PLCC package. Finally, the benchmark was performed to prove that Our FPGA has better performance than DSP(TMS320C32-40MHz) for the sequence logic control of PLC.

• Journal of the Korea Society for Simulation
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• v.25 no.4
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• pp.21-30
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• 2016

Recently manufacturing companies have used PLC control programs popularly for their automated production systems. Since the life cycle of production process is not so long, the change of the production lines occur frequently. Most of changes happen with modification of the position information and control process of the equipment. PLC control program is also modified based on the fundamental process. Therefore, to verify new PLC program by configuring virtual space according to real environment is needed. In this paper we show a logical modeling method, based on Timed-FSA useful for sequence control and dead-lock prevention. There is a problem wasting user's labor and time when defining a variety of states in a device. To overcome this problem, we propose an extended I-O model based on existing methods by adding a token concept of Petri Nets. Also we will show the usability of the extended I-O modeling through user study.