• Journal of Power Electronics
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• v.12 no.1
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• pp.104-112
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• 2012

In this paper a new method for the design of a simple PI controller is presented and it has been applied in the control of a Boost based PFC rectifier. The Strength Pareto evolutionary algorithm, which is based on the Pareto Optimality concept, used in Game theory literature is implemented as a multi-objective optimization approach to gain a good transient response and a high quality input current. In the proposed method, the input current harmonics and the dynamic response have been assumed as objective functions, while the PI controller's gains of the PFC rectifier (Kpi, Tpi) are design variables. The proposed algorithm generates a set of optimal gains called a Pareto Set corresponding to a Pareto Front, which is a set of optimal results for the objective functions. All of the Pareto Front points are optimum, but according to the design priority objective function, each one can be selected. Simulation and experimental results are presented to prove the superiority of the proposed design methodology over other methods.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.2
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• pp.182-192
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• 2015

This study develops a digital control scheme with power factor correction for a front-end converter in an electric vehicle battery charger. The front-end converter acts as the boost-type switching-mode rectifier. The converter assumes the two roles of the battery charger, which include power factor control and robust charging performance. The proposed control scheme consists of a charging control algorithm and a grid current control algorithm. The scheme aims to obtain unity input power factor and robust performance. Based on the linear average model of the converter, a constant-current constant-voltage charging control algorithm that passes through only one proportional-integral controller and a current feed-forward path is proposed. In the current control algorithm, we utilized a second band pass filter, a single-phase phase-locked loop technique, and a duty-ratio feed-forward term to control the grid current to be in phase with the grid voltage and achieve pure sinusoidal waveform. Simulations and experiments were conducted to verify the effectiveness of the proposed control scheme, both simulations and experiments.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.434-435
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• 2018

In this paper, a single-phase single-stage three-level AC/DC converter with a wide controllable output voltage is presented. It integrates a PFC converter and a three level DC/DC converter into one. The proposed converter operates at a fixed frequency and provides a wide controllable output voltage ($200V_{dc}-430V_{dc}$) with high efficiencies over a wide load range. In addition, the input boost inductors operate in a discontinuous mode to improve the input power factor. Moreover, all the switching devices operate with ZVS, and the converter's THD is small especially at full load. The feasibility of the proposed converter is verified with experimental results of a 1.5kW prototype.

• Proceedings of the KIEE Conference
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• 2001.07b
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• pp.1126-1128
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• 2001

A single-stage high-power-factor electron ic ballast operating in critical conduction mode is presented in this paper. The proposed topology is based on integration of a boost-like converter and a LCC Type half-bridge serial resonant inverter. The power-factor-correction(PFC) stage is a boost-like converter operating in critical conduction mode for positive and negative half cycle voltage respectively at line frequency (60Hz) so that a high power factor is achieved naturally. The simulated and experimental results for 100w fluorescent lamps operating at 42kHz switching frequency and 220V line voltage have been obtained.

• The Transactions of the Korean Institute of Power Electronics
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• v.16 no.2
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• pp.122-129
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• 2011

In this paper, a new power factor correction circuit(PFC) based on a soft-switched boost scheme is proposed. Except for some soft-switching transition intervals, it operates exactly like the conventional boost scheme. Thus the desirable features of both high efficiency and easy control can be obtained. The design guidelines are suggested to achieve high efficiency. To verify the superior performance of the proposed circuit, experiment and simulation is carried out.

• Proceedings of the KIEE Conference
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• 1996.07a
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• pp.255-258
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• 1996

A new low conduction loss, low cost zero-voltage-transition power factor correction circuit(PFC) is presented. Conventional PFC which consists of a bridge diode and a boost converter(one switch) always has three semiconductor conduction drops. Two switch type PFCs reduces conduction loss by reducing one conduction drop but the cost is increased because of increased number of active switches. The proposed PFC reduces conduction loss with one switch, which allows low cost. Conduction loss improvement is a little bit less than that of two switch type, but very close up. Operation and features are comparatively illustrated and verified by simulation and experimental results of 1 kW laboratory prototype.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.185-186
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• 2014

본 논문에서는 Si MOSFET 대비 GaN FET의 특성을 비교 분석하고, GaN FET의 장점을 활용할 수 있는 방안을 모색하였다. 그 결과 GaN FET의 우수한 reverse recovery 특성을 활용할 수 있는 토템폴 구조의 브리지리스 부스트 PFC 컨버터를 선정하였고, 선정한 회로의 동작 및 효율을 5.5kW급 프로토타입을 통하여 확인하였다.

• Proceedings of the KIEE Conference
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• 2002.06a
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• pp.12-15
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• 2002

This propose a simple DC voltage sensor less single phase PFC(Power Factor Correction Circuit) converter by detecting a AC current sensors are not required to construct the control system. The DC voltage is directly controlled by the command input signal Kd($V_o/V_a$)for the boost chopper circuit. The DC voltage regulation is small because of the feed forward control for the AC line voltage VS and no dependence of the circuit parameters. The sinusoidal current waveform in phase with the AC input voltage can be obtained. These characteristics are confirmed by some experiment results.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.160-161
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• 2017

기존의 단상 PFC(Power Factor Correction) 부스트 컨버터의 제어기는 부하전류와 듀티를 고려하지 않아 부하 변동시 출력전압을 일정하게 유지할 수 없다. 본 논문에서는 부하전류와 듀티를 보상하는 단상 PFC 부스트 컨버터 전압제어기 설계 방법을 제안한다. 인덕터 전류와 캐패시터 전류의 관계를 해석하여 제어기를 설계하고 모의 해석을 통해 입증한다.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.387-388
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• 2012

본 논문은 7kW급의 DCM PFC 회로를 제안한다. DCM 제어방식은 제어기의 복잡성이 단순하여 디지털 제어기 적용이 용이하며 인덕터 사이즈가 다른 방식에 비해 작게 설계됨으로 전력밀도를 높일 수 있지만 입력전압이 높아짐에 따라 역률은 상대적으로 낮아지는 단점이 있다. 본 논문에서는 7kW급 DCM 방식의 Boost PFC 컨버터를 구현하고 전류조형기법을 적용하여 넓은 입력 전압 범위에도 역률이 0.99이상이 되는 것을 실험을 통해 확인한다.