• Journal of Satellite, Information and Communications
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• v.11 no.3
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• pp.65-71
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• 2016

Currently developing the OBC of the next-generation LEO satellite by Korea Aerospace Research Institute adopts the LEON2-FT/AT697F processor to achieve high performance. And various communication devices such as SpaceWire, MIL-STD-1553B, DMAUART and CAN Master are integrated to the separated standard communication FPGAs within the OBC, where they can be controlled by the processor and flight software (FSW) through PCI interface. The Actel 1553BRM IP core is used for the 1553B in the next-generation LEO OBC and the B1553BRM wrapper from Aeroflex Gaisler is used for connecting it to the AMBA bus in FPGA. This paper presents the design and development of PCI-based 1553B communication software, and describes the handling mechanism of 1553B operation in FSW task level. Also it shows the test results on real-hardware and simulator.

• Journal of the Korea Concrete Institute
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• v.14 no.4
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• pp.492-502
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• 2002

The dapped ends of the Gerber's beam were designed by PCI(Prestressed Concrete Institute) and CPCI(Canadian Prestressed Concrete Institute) methods. The depths of nibs with precast and topping concrete, which were halves of the total beam depth, were 77 cm md 18.2 cm, respectably. Shear tests were performed on four full scale beam ends. All specimens designed by PCI and CPCI methods showed crackings at the re-entrant coner of dap before the 32 ％ of full service design loading, and failed at the load level higher than their design strength but less than their calculated nominal strength. The specimens with increased hanger reinforcement show more effective in development of initial crackings, more ductile in failure with distributed crackings, and failed in higher strength than those of PCI requirement. The tested specimens designed by CPCI method were more ductile in failure than those of the PCI methods.

• Journal of the Korean Data and Information Science Society
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• v.13 no.2
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• pp.285-294
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• 2002

The control chart is widely used tool for monitoring of the process. This paper deals with an interpretation of the process capability index(PCI) and process performance index(PPI) when the control chart is used for monitoring of the process. The main difference between the PCI and PPI is how we did estimate the process deviation. The PCI uses the within process variation and the PPI uses the total process variation, which is conceptually defined as sum of between process variation and within process variation. Easy interpretations of the PCI and PPI for field engineers are described. And some new approaches to interpretation of the process capability and performance index may be useful in early stabilization of new process.

• Journal of Korean Physical Therapy Science
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• v.7 no.1
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• pp.285-294
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• 2000

80 persons who don't have past history of cardiopulmonary and neuromuscular disease. The results were as follow; 1. PCI(Physiological Cost Index) value without loading to ankle were significantly increased compared to 1kg, and 2kg (p<0.01). 2. Female Subjects showed more increased PCI value in without loading and lkg, 2kg loading compared to male subjects (p<0.01). 3. In every PCI condition the difference among height groups was observed (p<0.01). 4. The difference among weight groups in each PCI condition was observed (p<0.01). These results showed that energy consumption was increased according to loading on the ankle during gait so weight of orthosis or prosthesis must be considered when choosing them and during gait training with these ones.

• Proceedings of the Korea Information Processing Society Conference
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• 2016.10a
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• pp.58-61
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• 2016

.PCI Express는 고속, 저전력 등의 특성으로 업계 표준으로서 많이 쓰이고 있는 프로세서와 주변 I/O 장치들을 연결하는 버스 기술이다. 또한, PCI Express는 인피니밴드와 이더넷과 더불어 고성능 컴퓨터나 컴퓨터 클러스터를 위한 시스템 인터커넥트 기술로 널리 쓰이고 있다. PGAS(partitioned global address space) 프로그래밍 모델은 컴퓨터 클러스터와 같은 다중 호스트 시스템에서 단측 RDMA(remote direct memory access)를 구현하는데 많이 이용된다. 본 논문에서는 PCI Express 기반 RDMA를 구현하기 위해 PGAS 프로그래밍 모델인 OpenSHMEM의 기존의 특징을 유지하여 PCI Express 기반 OpenSHMEM API를 설계 및 구현하였다. 구현한 OpenSHMEM API는 PCI Express의 NTB(non-transparent bridge) 기술로 2대의 PC를 연결한 시스템에서 매트릭스 곱셈 예제를 통하여 실험하였다.

• Journal of Korean Society for Quality Management
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• v.28 no.2
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• pp.103-122
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• 2000

Process capability indices (PCI) $C_p\;C_{pk},\;C_m,\;and\;C_{pmk}$ are widely used to evaluate the process performance. The PCI's have been evolved to consider the 'off targetness' more adequately. However, all of these indices are found to be inconsistent with the proportion of nonconforming items, in some cases. That is, the PCI for a process may result in higher value even when the proportion of defectives increases. For these reasons, we propose a new capability index, $c_{pd}$, which is consistent with the defect rate. The characteristics of the new PCI, $c_{pd}$ are investigated with respect to the existing PCI's. Some statistical properties of an estimator for $c_{pd}$ are also investigated by a Monte Carlo simulation. Sensitivity study under minor deviation from normality is also performed to show the robustness of $c_{pd}$. A good estimator for $c_{pd}$ is under study.

• Journal of the Korea Society for Simulation
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• v.12 no.4
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• pp.95-102
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• 2003

Stream servers are for supplying multimedia stream data to users through the internet such as movies and music without discontinuation. A typical stream server is designed roughly by considering the characteristics of stream services and by employing processors, memory, PCI bus, Ethernet, TOE and disks. This study focuses on deciding the priority for using resources such as PCI bus, buffer memory and TOE buffer, which have limited capacities in a typical stream server. When the priorities for using limited resources are not given properly, the stream servers may not even function as originally designed. The simulation study shows that the top priority for using PCI bus for normal streaming services should be given to the operation that sends data from buffer memory to TOE buffer. Giving priority for using PCI bus to other operation such as sending data from disks to memory results in a deadlock phenomenon.

• Proceedings of the Korea Society for Simulation Conference
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• 2001.05a
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• pp.77-81
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• 2001

In this paper, a RAID system is modeled and simulated by using the DEVS formalism. The RA[D system interacts with a host system by using the high-speed Fibre channel protocol and stores input data in an array of IDE disks. The DEVS formalism specifies discrete event systems in a hierarchical, modular manner. The RAID system model is composed of three units: primary-PCI unit, secondary-PCI unit and CPU unit. The primary-PCI unit interfaces with the host system and caches I/O data. The secondary-PCI unit includes disks. The CPU unit controls overall system. The control algorithm of CPU and PCI transactions are analyzed and modeled. From an analysis of simulation events, we can conclude that the proposed model satisfies given requirements.

• Journal of the Korea Society for Simulation
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• v.11 no.1
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• pp.11-22
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• 2002

In this paper, a RAID system is modeled and simulated by using the DEVS formalism. The RAID system interacts with a host system by using the high-speed Fibre channel protocol and stores data in an array of IDE disks. The DAVS formalism specifies discrete event systems in a hierarchical, modular manner. The RAID system model is composed of three units: primary-PCI unit, secondary-PCI unit and MCU unit. The primary-PCI unit interfaces with the host system and I/O data caches. The secondary-PCI unit includes disks. The MCU unit controls overall system. The control algorithm of MCU and PCI transactions are analyzed and modeled, From the analysis of simulation events, we can conclude that the proposed model satisfies given requirements.

• Proceedings of the Korea Society for Simulation Conference
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• 2003.11a
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• pp.67-74
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• 2003

Stream servers are for supplying multimedia stream data to users through the internet such as movies and musics without discontinuation. A typical stream server is designed roughly by considering the characteristics of stream services and by employing processors, memory, PCI bus, Ethernet, TOE and disks. This study focuses on deciding the priority for using resources such as PCI bus, buffer memory and TOE buffer, which have limited capacities in a typical stream server. The simulation study shows that the top priority for using PCI bus for normal streaming services should be given to the operation that sends data from buffer memory to TOE buffer Giving priority for using PCI bus to other operation such as sending data from disks to memory results in deadlock Phenomenon.