• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1836-1839
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• 2005

We have developed Ethernet based real-time communication systems called "Vnet/IP" for DCS which is the control system for process automation. This paper describes the features and the technologies of the ASIC which is utilized in the communication interface hardware for Vnet/IP. Vnet/IP has been developed for mission-critical communications. Hence it has real-time feature, high reliability and precise time synchronization capability. At the same time, it is able to deal with standard protocols without influence on mission-critical communications. The communication interface hardware has a host interface and dual redundant network interfaces. The host interface can be chosen PCI-bus or R-bus which is the proprietary internal bus developed for the high reliable redundant controller. Each network interface is a RJ45 connection with 1Gbps maximum in compliance with IEEE802.3.

• 한국콘크리트학회:학술대회논문집
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• 한국콘크리트학회 2000년도 가을 학술발표회논문집(I)
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• pp.523-528
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• 2000

In multi-span bridges, a shear key is often used to distribute the seismic force to the case, the shear key is sometimes required to be reinforced to withstand the seismic force. To improve the strength of shear key, the strength and failure mode of shear key have to be carefully estimated and the proper reinforcement scheme should be elaborated. The test results show that the strength of shear key is 2.5 times higher than the strength calculated by PCI design handbook. Also the strength of shear key is greatly improved by placing PT bars into shear key. In this study, the analytical method to evaluate the strength of sheat key and the reinforcement scheme are proposed.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 춘계학술대회
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• pp.566-569
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• 2011

동기 및 비동기 데이터를 동시에 전송할 수 있는 MOST(Media Oriented Systems Transport) 네트워크는 최근 자동차 멀티미디어 시스템에 가장 광범위하게 사용되고 있는 통신 시스템이다. MOST는 주로 링 형태로 연결되어지며 마스터 역할을 하는 장치가 반드시 하나 존재하고 여러 개의 슬레이브 장치들이 존재한다. 또한 MOST 네트워크에 연결된 여러 장치를 제어할 수 있는 HMI가 필요하다. HMI는 독립적인 장치로 만들 수도 있지만 일반적으로 Master 기능을 통합하여 구현한다. 본 논문에서는 MOST 네트워크에서 동영상 재생 플레이어인 DVD를 제어하기 위해서 HMI 역할을 하는 응용프로그램을 설계 및 구현하였다. DVD 제어를 위한 HMI 프로그램은 MOST NetServices API를 이용하여서 컨트롤 메시지를 전송해서 DVD 장치를 제어하며, 사용자가 쉽게 사용할 수 있는 GUI 형태로 구현하였다. MOST25 PCI 카드와 MOST DVD 플레이어 장치를 네트워크로 연결하고, PC에 DVD 장치 제어 HMI를 구현한 후 테스트하여 정상적으로 동작함을 확인하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 합동 추계학술대회 논문집 정보 및 제어부문
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• pp.406-408
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• 2001

In this thesis, a video tracker with a TMS320C31 DSP is designed and implemented. It is intended to work with PC through PCI Bus and can be used in real-time applications. The DSP board is capable of grabbing image data from camera, and calculating the position of a target, and tracking its movement. The tracking situation can be displayed in a PC monitor and displacement of the movement is fed back to pan and tilt the camera. Experimental results show that the tracker implemented here works well in real applications.

• International Journal of Advanced Culture Technology
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• 제4권4호
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• pp.30-37
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• 2016

In this paper, the method of controlling the clock that is inputted on the hardware from the application, and the hardware design method are to be proposed. When the hardware is synthesized to the Field Programmable Gate Array(FPGA), the input clock is fixed, and when the input clock is changed, the synthesis process must be passed again to require more time. To solve this problem, the Mixed-Mode Clock Manager(MMCM) module is mounted to control the MMCM module from the application. The controlled MMCM module controls the input clock of the module. The experiment was process the Neural Network algorithm in the x86 CPU and SIMT based processor mounted the FPGA. The results of the experiment, SIMT-based processors, the time that is processed at a frequency of 50MHz was 77ms, 100MHz was 34ms. There was no additional synthesis time due to a change of the clock frequency.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.205-208
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• 2002

An existing ATM switch fabric uses VPI(Virtual Path Identifier) and VCI(Virtual Channel Identifier) information to route ATM cell. But AAL type 2 switch which efficiently processes delay-sensitive, low bit-rate data such as a voice routes the ATM cell by using CID(Channel Identification) field in addition to VPI and VCI. In this paper, we research the AAL type 2 switch that performs the process of CPS packet. The Receive unit extracts the CPS packet from the inputted ATM cell. The designed receive unit consists of input FIFO, r)( status table, CAM(Content Addressable Memory), new CID table and partial packet memory. Also the designed receive unit supports the PCI interface with host processor. The receive unit is implemented in Xilinx FPGA and operates at 72MHz.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.951-954
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• 2002

This paper presents the implementation of hash functions for IPSEC chip. There is an increasing interest in high-speed cryptographic accelerators for IPSec applications such as VPNs (virtual private networks). Because diverse algorithms are used in Internet, various hash algorithms are required for IPSec chip. Therefore, we implemented SHA-1, HAS-160 and MD5 in one chip. These hash algorithms are designed to reduce the number of gates. SHA-1 module is combined with HAS-160 module. As the result, the required logic elements are reduced by 27%. These hash algorithms have been implemented using Altera's EP20K1000EBC652-3 with PCI bus interface.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 신호처리소사이어티 추계학술대회 논문집
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• pp.83-86
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• 2003

In this paper, we propose a new hardware architecture for integer transform, quantizer operation of a new video coding standard H.264/JVT. We describe the algorithm to derive hardware architecture emphasizing the importance of area for low cost and low power consumption. The proposed architecture has been verified by PCI-interfaced emulation board using APEX-II Altera FPGA and also by ASIC synthesis using Samsung 0.18 ${\mu}{\textrm}{m}$ CMOS cell library. The ASIC synthesis result shows that the proposed hardware can operate at 100 MHz, processing more than 1, 300 QCIF video frames per second. The hardware is going to be used as a core module when implementing a complete H.264 video encoder/decoder ASIC for real-time multimedia application.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.871-874
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• 2003

본 논문에서는 디지털 데이터 내에 사용자의 정보나 저작권 정보를 나타내기 위해 삽입되는 워터마크를 추출할 때 원본 이미지나 개인 키를 필요로 하지 않는 Blind Watermarking 방법을 개선하였다. 기존의 워터마킹 방법에서는 워터마크를 추출하기 위해 원본 이미지를 사용하거나 원본 이미지를 사용하지 않는 경우에는 개인 키를 사용하여 워터마크를 추출하였다. 제안하는 워터마킹 알고리즘은 워터마크를 주파수 대역 별로 삽입하는 것으로써 수정된 DCT 계수를 기반으로 하였고, 삽입 및 추출 연산의 복잡성을 배제하여 속도가 빠르고 하드웨어의 구조가 간단하다. 또한, 워터마크를 저 주파수 대역과 고 주파수 대역에 삽입하여 압축 및 에러 환경에 강인한 성격을 가진다. 제안한 알고리즘의 FPGA와 PCI Interface 를 통한 구현 및 검증에 대해서도 논하였다.

• Korea-Australia Rheology Journal
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• 제18권1호
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• pp.1-8
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• 2006

Blend of bisphenol-A polycarbonate (PC) and (acrylonitrile-styrene-acrylic rubber) terpolymer (ASA) having excellent balance in the interfacial properties and mechanical strength was developed for the automobile applications. Since interfacial adhesion between PC and styrne-acrylonitrile copolymer (SAN) matrix of ASA is not strong enough, two different types of compatibilizers, i.e, diblock copolymer composed of tetramethyl polycarbonate (TMPC) and SAN (TMPC-b-SAN) and poly(methyl methacrylate) (PMMA) were examined to improve interfacial adhesion between PC and SAN. TMPC-b-SAN was more effective than PMMA in increasing interfacial adhesion between PC and SAN matrix of ASA (or weld-line strength of PC/ASA blend). When blend composition was fixed, PC/ASA blends exhibited similar mechanical properties except impact strength and weld-line strength. Impact strength of PCI ASA blend at low temperature was influenced by rubber particle size and its morphology. PC/ASA blends containing commercially available PMMA as compatibilizer also exhibited excellent balance in mechanical properties and interfacial adhesion.