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Hardware design and control method for controlling an input clock frequency in the application

  • Lee, Kwanho (Dept. Electronics and Computer Engineering, Seokyeong Univ.) ;
  • Lee, Jooyoung (Dept. Electronics and Computer Engineering, Seokyeong Univ.)
  • Received : 2016.10.29
  • Accepted : 2016.11.21
  • Published : 2016.12.30

Abstract

In this paper, the method of controlling the clock that is inputted on the hardware from the application, and the hardware design method are to be proposed. When the hardware is synthesized to the Field Programmable Gate Array(FPGA), the input clock is fixed, and when the input clock is changed, the synthesis process must be passed again to require more time. To solve this problem, the Mixed-Mode Clock Manager(MMCM) module is mounted to control the MMCM module from the application. The controlled MMCM module controls the input clock of the module. The experiment was process the Neural Network algorithm in the x86 CPU and SIMT based processor mounted the FPGA. The results of the experiment, SIMT-based processors, the time that is processed at a frequency of 50MHz was 77ms, 100MHz was 34ms. There was no additional synthesis time due to a change of the clock frequency.

Keywords

References

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