• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.10 no.7
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• pp.1065-1073
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• 1999

This paper analyzed the ground bounce caused by the power plane resonance in the multilayered printed circuit board(PCB) using the Haar-wavelet-based Multiresolution Time-Domain (MRTD). In conventional Finite-Difference Time-Domain(FDTD), the highly fine vertical cell is needed to represent the distance between $V_{cc}$ plane and ground plane since the two planes are very close. Therefore the time step $\Deltat$ must be very small to satisfy the stability condition. As a result, a large number of iterations are needed to obtain the response in wanted time. For this problem, this paper showed that the computation time can be reduced by application of the MRTD method. The results obtained by the MRTD agree very well with those by FDTD method and analytic solutions. In conclusion, this paper proved the efficiency and accuracy of MRTD method for analyzing the EMI/EMC problems in PCB.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.49 no.8
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• pp.661-669
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• 2021

A mechanical stiffener has been mainly applied on a PCB to secure fatigue life of a solder joint of an electronic components in spaceborne electronics by minimizing bending displacement of the PCB. However, it causes an increase of mass and volume of the electronics. The high damping PCB implemented by multi-layered viscoelastic tapes of a previous research was effective for assuring the fatigue life of the solder joint, but it also has a limitation to decrease accommodation efficiency for the components on the PCB. In this study, we proposed high damping PCB with a multi-layered superelastic shape memory alloy stiffener for spatialminimized, light-weighted, high-integrated structure design of the electronics. To investigate the basic characteristics of the proposed PCB, a static load test, a free vibration test were performed. Then, the high damping characteristic and the design effectiveness of the PCB were validated through a random vibration test.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.10
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• pp.2935-2944
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• 2009

This paper proposes Dual DBR(Drum-Buffer-Rope) system for a small-to-medium-sized PCB(Printed Circuit Board) manufacturing line. DBR method of TOC(Theory of Constraints) is an effective system for a small-to-medium-sized company to build production scheduling system. But to apply it to PCB line, it needs more technical consideration because of multiple constraints, looping process line and complex buffer management. This paper proposes an answer of these problems using Dual DBR to build production scheduling system more successfully. And it was confirmed that lead time was reduced more than 20% applying Dual DBR system to a domestic PCB manufacturing line actually.

• Journal of electromagnetic engineering and science
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• v.14 no.1
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• pp.43-45
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• 2014

We propose a printed circuit board (PCB)-embedded antenna for millimeter-wave chip-to-chip communication. The antenna is 0.18 mm in height which is 1/20 wavelength at 80 GHz. In order to realize such a low profile, a zeroth-order resonator antenna with a periodic array of four unit cells is employed, and its geometry is optimized to cover an 8-GHz bandwidth from 76 to 84 GHz. With this;the antenna is capable of radiating in a direction parallel to the board length despite the short distance between the ground and the radiator. Simulation and measurement results show that the optimized design has low reflection coefficients and consistent radiation patterns throughout the target bandwidth.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.1
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• pp.21-28
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• 2004

We have demonstrated the applicability of dry film photoresist (DFR) in photolithography process for fine pitch solder bumping on the polytetrafluoroethylene (PTFE/Teflon ) printed circuit board (PCB). The copper lines were formed with 100$\mu\textrm{m}$ width and 18$\mu\textrm{m}$ thickness on the PTFE test board, and varying the gaps between two copper lines in a range of 100-200$\mu\textrm{m}$. The DFRs of 15$\mu\textrm{m}$ thickness were laminated by hot roll laminator, by varying laminating temperature from $100{\circ}C$ to 15$0^{\circ}C$ and laminating speed from 0.28-0.98cm/s. We have found the optimum process of DFR lamination on PTFE PCB and accomplished the formation of indium solder bumps. The optimum lamination condition was temperature of $150^{\circ}C$ and speed of about 0.63cm/s. And the smallest size of indium solder bump was diameter of 50$\mu\textrm{m}$ with pitch of 100$\mu\textrm{m}$.

• International Journal of Control, Automation, and Systems
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• v.5 no.2
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• pp.192-199
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• 2007

This paper proposes a new printed circuit board (PCB) assembly planning method for multi-head surface mounters. We present an integer programming formulation for the optimization problem, and propose a heuristic method to solve the large NP-complete problem within a reasonable time. A dynamic programming technique is then applied to the feeder arrangement optimization and placement sequence optimization to reduce the overall assembly time. Comparative simulation results are finally presented to verify the usefulness of the proposed method.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1720-1721
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• 2008

인간에게 있어서 시각 능력이란 정보 취득 및 처리 과정에 있어서 중요한 역할을 한다. 이러한 능력은 기계에 있어서도 자동화가 진전이 될수록 기계의 시각 능력 즉, 머신 비전의 기술이 중요한 역할을 한다. 따라서 산업이 발전함에 따라 머신 비전의 기술은 여러 분야에 걸쳐 요구되며, 이에 따른 연구가 활발히 진행되고 있다. 본 연구에서도 산업 현장에 적용 할 수 있는 최적의 머신 비전 시스템 설계를 목적으로 하였으며, 그에 따른 PCB기판 검사 시스템에 대하여 연구하였다.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.2
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• pp.35-41
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• 2011

Recently, board level solder joint reliability performance of IC packages during drop impact becomes a great concern to semiconductor and electronic product manufacturers. The handheld electronic products are prone to being dropped during their useful service life because of their size and weight. The IC packages are susceptible to solder joint failures, induced by a combination of printed circuit board (PCB) bending and mechanical shock during impact. The board level drop testing is an effective method to characterize the solder joint reliability performance of miniature handheld products. In this paper, applying the JEDEC (JESD22-B111) standard present a finite element modeling of the FBGA. The simulation results revealed that maximum stress was located at the outermost solder ball in the PCB or IC package side, which consisted well with the location of crack initiation observed in the failure analysis after drop reliability tests.

• Transactions of the Korean Society of Mechanical Engineers
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• v.19 no.12
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• pp.3329-3343
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• 1995

The interaction of mixed convection and surface radiation in a printed circuit board(PCB) is investigated numerically. The electronic equipment is modeled by a two-dimensional channel with three hot blocks. In order to calculate the turbulent flow characteristics, the low Reynolds number k-.epsilon. model which is proposed by Launder and Sharma is applied. The S-4 approximation is used to solve the radiative transfer equation. The effects of the Reynolds number and geometric configuration variation of PCB on the flow and heat transfer characteristics are analyzed. As the results of this study, it is found that the thermal boundary layer occured at adiabatic wall in case with thermal radiation included, and the effect of radiation is also found to be insignificant for high Reynolds numbers. It is found, as well, that the heat transfer increases as the Reynolds number and block space increase and the channel height decreases and the heat transfer of vertical channel is greater than that of horizontal channel.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.151-155
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• 2002

This paper presents a micro fluxgate magnetic sensor in printed circuit board (PCB). The fluxgate sensor consists of five PCB stack layers including one layer magnetic core and four layers of excitation and pick-up coils. The center layer as a magnetic core is made of a micro patterned amorphous magnetic ribbon with extremely high DC permeability of ∼100,000 and the core has a rectangular-ring shape. The amorphous magnetic core is easily saturated due to the low coercive field and closed magnetic path for the excitation field. Four outer layers as an excitation and pick-up coils have a planar solenoid structure. The chip size of the fabricated sensing element is 7.3${\times}$5.7m㎡. Excellent linear response over the range of -100${\mu}$T to +100${\mu}$T is obtained with 540V/T sensitivity at excitation square wave of 3V$\_$P-P/ and 360kHz. The very low power consumption of ∼8mW was measured. This magnetic sensing element which measures the lower fields than 50${\mu}$T, is very useful for various applications such as: portable navigation systems, military research, medical research, and space research.