• Title/Summary/Keyword: PCB assembly

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An Efficient PCB Assembly Method by Multiple Adsorption with Gantry Type SMD using Simulation (갠트리 타입 SMD에서 동시 흡착에 의한 효율적 PCB 조립 방안의 시뮬레이션 연구)

  • Moon, Gee-Ju;Kim, Gwang-Pil
    • Journal of the Korea Society for Simulation
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    • v.15 no.4
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    • pp.59-67
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    • 2006
  • An efficient PCB assembly method with Gantry type machine is developed and proposed in this paper to improve system productivity. Nozzle changes at Gantry type machine is the major reason causing lower system performance instead of header and slot movements on the other type machines. The problem is attacked by maximizing multiple adsorptions to reduce the number of necessary nozzle changes with Gantry type machine. It is designed to reduce the assembly time per PCB with multiple adsorptions based upon the positions of feeders and nozzles. A simulation model is constructed to show the effectiveness of the suggested heuristic and necessarily a comparison study is followed with different methods on selection of next assembly feeder and nozzle with various cases.

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다수 표면실장기계를 포함하는 PCB조립라인의 작업분배 알고리즘 설계 II

  • 김진철;이성한;이범희
    • 제어로봇시스템학회:학술대회논문집
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    • 1996.10b
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    • pp.1237-1240
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    • 1996
  • This paper proposes a heuristic algorithm for performing the line balancing of PCB assembly fine including multiple surface mounters efficiently. We consider a PCB assembly line including the multiple surface mounters arranged serially as a target system. We assume that the number of heads of surface mounters can be changed. Also, the conveyor is assumed to move at a constant speed and have no buffer. Considering the minimum number of machines required for the desired production rate is a discrete nonincreasing function which is inversely proportional to the cycle time, we propose an optimization algorithm for line balancing by using the binary search method. Also we propose an head-changing algorithm. The algorithms are validated through the computer simulation.

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Heavy-Weight Component First Placement Algorithm for Minimizing Assembly Time of Printed Circuit Board Component Placement Machine

  • Lee, Sang-Un
    • Journal of the Korea Society of Computer and Information
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    • v.21 no.3
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    • pp.57-64
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    • 2016
  • This paper deals with the PCB assembly time minimization problem that the PAP (pick-and-placement) machine pickup the K-weighted group of N-components, loading, and place into the PCB placement location. This problem considers the rotational turret velocity according to component weight group and moving velocity of distance in two component placement locations in PCB. This paper suggest heavy-weight component group first pick-and-place strategy that the feeder sequence fit to the placement location Hamiltonean cycle sequence. This algorithm applies the quadratic assignment problem (QAP) that considers feeder sequence and location sequence, and the linear assignment problem (LAP) that considers only feeder sequence. The proposed algorithm shorten the assembly time than iATMA for QAP, and same result as iATMA that shorten the assembly time than ATMA.

Minimization of Rack and Board Moving Distance of PCB Assembler using Neighboring Positioned Identical Components (동일부품 집단화현상을 이용한 PCB 자동조립기 랙과 기판의 이동거리 최소화)

  • Moon, Gee-Ju;Jung, Hyun-Chul
    • IE interfaces
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    • v.18 no.3
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    • pp.297-307
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    • 2005
  • PCB assembly is a complicated and difficult process to optimize due to the necessity of simultaneous consideration of component’s rack assignment and board mounting sequencing. An efficient PCB assembly method is developed by using neighboring positioned identical components information as well as quantity and size of the components. It is found that same type of components are located closely each other by checking real PCBs and interviewing with PCB designers in practice. Better performance of the developed procedure is obtained along with more number of total components and more number of neighboring positioned identical components cases. Simulation models are developed using Visual C++ for performance evaluation purposes of the suggested heuristic.

Design of a line balancing algorithm for the PCB assembly line including multiple surface mounters (다수 표면실장기계를 포함하는 PCB 조립라인의 라인균형화 알고리즘 설계)

  • Kim, Jin-Cheol;Lee, Sung-Han;Kim, Dae-Won;Lee, Bum-Hee
    • Journal of Institute of Control, Robotics and Systems
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    • v.3 no.4
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    • pp.381-388
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    • 1997
  • This paper proposes a heuristic algorithm to efficiently perform line balancing in the PCB assembly line including multiple surface mounters efficiently. Generally, the problems in line balancing are classified into two kinds. Firstly, is the determining of the minimum number of machines required for achieving the desired production rate. Secondly, is the assign of jobs to multiple machines in order to minimize the cycle time which is defined as a maximum among the working times of machines when the number of machines is fixed. In this paper, we deal with the latter. We consider a PCB assembly line, including the multiple surface mounters arranged serially as a target system. Also, the conveyor is assumed to move at a constant speed and have no buffer. Considering that the minimum number of machines required for the desired production rate is a discrete nonincreasing function which is inversely proportional to the cycle time, we propose an optimization algorithm for line balancing by using the binary search method. The algorithm is validated through computer simulation, the results of which show that their shapes coincide nearly with those of optimal line balancing efficiency graphs regardless of the number of components, the performance of surface mounters, and the structure of assembly line.

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Flip Chip Assembly on PCB Substrates with Coined Solder Bumps (코인된 솔더 범프를 형성시킨 PCB 기판을 이용한 플립 칩 접속)

  • 나재웅;백경욱
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.11a
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    • pp.21-26
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    • 2002
  • Solder flip chip bumping and subsequent coining processes on PCB were investigated to solve the warpage problem of organic substrates for high pin count flip chip assembly by providing good co-planarity. Coining of solder bumps on PCB has been successfully demonstrated using a modified tension/compression tester with height, coining rate and coining temperature variables. It was observed that applied loads as a function of coined height showed three stages as coining deformation : (1) elastic deformation at early stage, (2) linear increase of applied load, and (3) rapid increase of applied load. In order to reduce applied loads for coining solder bumps on PCB, effects of coining process parameters were investigated. Coining loads for solder bump deformation strongly depended on coining rates and coining temperatures. As coining rates decreased and process temperature increased, coining loads decreased. Among the effect of two factors on coining loads, it was found that process temperature had more significant effect to reduce applied coining loads during the coining process. Lower coining loads were needed to prevent substrate damages such as micro-via failure and build-up dielectric layer thickness change during applying loads. For flip chip assembly, 97Pb/Sn flip chip bumped devices were successfully assembled on organic substrates with 37Pb/Sn coined flip chip bumps.

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PCB Assembly Optimization of Chip Mounters for Multiple Feeder Assignment (다중피더배치를 고려한 칩마운터의 조립순서 최적화)

  • Kim Kyung-Min;Park Tae-Hyoung
    • Journal of Institute of Control, Robotics and Systems
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    • v.11 no.2
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    • pp.144-151
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    • 2005
  • We propose an optimization method to reduce the assembly time of chip mounters. Feeder arrangement and assembly sequence are determined considering the multiple feeder assignment. The problem is divided into two sub-problems: feeder arrangement problem and assembly sequence problem. We present mathematical model for each sub-problem. The clustering algorithm and assignment algorithm are applied to solve the feeder arrangement problem. The assignment algorithm and connection algorithm are applied to solve the assembly sequence problem. Simulation results are then presented to verity the usefulness of the proposed method.

Path Planning of Automated Optical Inspection Machines for PCB Assembly Systems

  • Park Tae-Hyoung;Kim Hwa-Jung;Kim Nam
    • International Journal of Control, Automation, and Systems
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    • v.4 no.1
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    • pp.96-104
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    • 2006
  • We propose a path planning method to improve the productivity of AOI (automated optical inspection) machines in PCB (printed circuit board) assembly lines. The path-planning problem is the optimization problem of finding inspection clusters and the visiting sequence of cameras to minimize the overall working time. A unified method is newly proposed to determine the inspection clusters and visiting sequence simultaneously. We apply a hybrid genetic algorithm to solve the highly complicated optimization problem. Comparative simulation results are presented to verify the usefulness of the proposed method.

Automatic Extraction of Component Inspection Regions from Printed Circuit Board by Image Clustering (영상 클러스터링에 의한 인쇄회로기판의 부품검사영역 자동추출)

  • Kim, Jun-Oh;Park, Tae-Hyoung
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.3
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    • pp.472-478
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    • 2012
  • The inspection machine in PCB (printed circuit board) assembly line checks assembly errors by inspecting the images inside of the component inspection region. The component inspection region consists of region of component package and region of soldering. It is necessary to extract the regions automatically for auto-teaching system of the inspection machine. We propose an image segmentation method to extract the component inspection regions automatically from images of PCB. The acquired image is transformed to HSI color model, and then segmented by several regions by clustering method. We develop a modified K-means algorithm to increase the accuracy of extraction. The heuristics generating the initial clusters and merging the final clusters are newly proposed. The vertical and horizontal projection is also developed to distinguish the region of component package and region of soldering. The experimental results are presented to verify the usefulness of the proposed method.

A study on the method of efficient PCB assembly by separation of crowed area and double allocation of slot (밀집구역분리와 슬롯이중배정에 의한 효율적 PCB 조립 방법의 연구)

  • Moon, Gee-Ju;Chang, Jae-Hyuk
    • Journal of the Korea Society for Simulation
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    • v.14 no.2
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    • pp.25-34
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    • 2005
  • Determination of component mounting sequence on printed circuit board assembly process is a typical NP-hard problem. It is a kind of traveling salesman problems, but it has one more hard to meet constraint of matching component type per mounting position as well as searching the shortest path. An efficient method is developed by separation of crowed area and allowing up to two slots per component type. A simulation model is constructed using Visual C++ for evaluation of the suggested heuristic.

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