• Journal of the Korean Society for Precision Engineering
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• v.18 no.1
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• pp.111-116
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• 2001

A practical scheme to reduce failure of the PCB(Printed Circuit Board) of a monitor is introduced using deformed mode shape under mechanical shock. When the monitor is given critical shock loads, cracks are commonly initiated at the tip of a hole on the PCB. Accordingly, a deformed mode shape of the PCB is obtained using a FEM code to define a weak point on the PCB under mechanical shock, and then the position and direction of the hole is determined to prevent the failure at the critical mode shape. Also, the stress intensity factor around the weak point on the PCB is calculated to check the possibility of fracture by normal tensile stress. In conclusion, present research is useful to assist the practical design of components-layout on the PCB.

• Proceedings of the Computational Structural Engineering Institute Conference
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• 1995.04a
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• pp.203-210
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• 1995

A construction method for continuous prestressed Composite Bridges(PCB's) is developed and successfully applied to the design of two-span continuous PCB's of five different span lengths. The construction of continuous PCB's goes through 17 different loading conditions. for each loading condition, the allowable stress design method is used to determine section properties. The analytical results of two-span continuous PCB's arc compared with those of simple PCB's. The comparison shows that the use of the proposed method can reduce 10-15 percents of the concrete section area and approximate 28 percents of the steel section area, as well as 5-8 percents of the girder height. The study indicates that the use of the proposed PCB's method can significantly reduce construction and maintenance costs of bridges.

• Journal of the Microelectronics and Packaging Society
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• v.28 no.4
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• pp.31-39
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• 2021

In this paper, warpage analysis that separates PCB for PoP (Package on Package) into unit and substrate using FEM (Finite Element Method), analysis of the effect of layer thickness on warpage, and SN (Signal-to-Noise) ratio by Taguchi method was carried. According to the analysis result, the contribution of the circuit layer on warpage was very high in the unit PCB, and the contribution of the outer layer was particularly high. On the other hand, the substrate PCB had a high influence of the circuit layer on warpage, but it was relatively low compared to the unit PCB, and the influence of the solder resist was rather increased. Therefore, considering the unit PCB and the substrate PCB at the same time, it is desirable to design the PCB for PoP layer-by-layer structure so that the outer and inner circuit layers are thick, the top solder resist is thin, and the thickness of the bottom solder resist is between 5 ㎛ and 25 ㎛.

• Korean Journal of Computational Design and Engineering
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• v.15 no.6
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• pp.418-424
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• 2010

For an engineering analysis to predict a bending of PCB by heat, geometry information from CAM data should be transferred to CAE system. But because this work is done by people, not computer, in PCB manufacturing company, it takes too much time, makes many errors and a result is unreliable. To solve these problems, we analyze a working process of company, then develop a CAM to CAE interface to translate a CAM data into a data to be input into a CAE system automatically.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.2
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• pp.29-33
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• 2011

Research about the geometry design of lead pin was carried based on the normal or shear stress of the interface between a lead pin and a PCB in terms of delamination failure. The taguchi method with four design factors of three levels and FEA(Finite element Analysis) are carried under $20^{\circ}$ bending and 50 ${\mu}m$ tension of lead pin. The contact width, d2, between head round and copper pad in PCB is the highest affection factor among design factors by analysis of contribution analysis. Equivalent von Mises stress of 18.7% reduction design is obtained by the parameter design of the taguchi method. Maximum normal stress occurred at contact position between solder outer surface and a Cu pad in PCB. Also, maximum shear stress happened at contact position between solder outer surface and SR layer of PCB. From these calculated results, delamination of the PGA package may be occurred from outer interface of solder to inner interface of solder.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.2
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• pp.264-268
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• 2009

In this paper, the two PCB design method results of boost converters are simulated with same circuit device parameters. One is modeled with microstrip structure and the other is modeled two layers structure without reference plane. Between devices of each circuit are routed 5 centimeters. When the switching frequency is operated 100kHz, the overshoot by signal reflection and the noise characteristics by frequency spectrum for the output voltage and current of the power switch is compared and analyzed using simulation.

• Journal of Applied Reliability
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• v.4 no.2
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• pp.121-131
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• 2004

HALT (Highly Accelerated Life Test) was performed to improve the reliability by removing the potential failure for newly developing PCB used for the vibration condition from 2OHz to 2OOHz. During HALT, it is found that the lead of Al electrolytic capacitor of SMD type is detached from PCB. As the result for the failure analysis and FEM (Finite Element Method), it is clarified that the root cause for this failure is the improper attachment of an Al electrolytic capacitor on PCB by the mistake of a PCB design. HALT was performed in previous condition to verify the failure analysis after molding an epoxy resin to overcome the PCB design mistake and it is not observed the same failure. Therefore, it is assumed that the same failure in field will be not occurred by the proper implementation.

• ETRI Journal
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• v.46 no.4
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• pp.581-594
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• 2024

In this study, a planar printed circuit board (PCB) coil with FR4 substrate was designed and simulated using the finite element method, and the results were analyzed in the frequency domain. This coil can be used in wireless power transfer (WPT) as a transmitter or receiver, eliminating wires. It can also be used as the receiver in radio frequency energy-harvesting (RF-EH) systems by optimizing the planar PCB coil to convert radio-wave energy into electricity, and it can be employed as an excitation (transmitter) or receiver coil in nuclear magnetic resonance (NMR) spectroscopy. This PCB coil can replace the conventional coil, yielding a reduced occupied volume, a fine-tuned design, reduced weight, and increased efficiency. Based on the calculated gain, power, and electromagnetic and electric field results, this planar PCB coil can be implemented in WPT, NMR spectroscopy, and RF-EH devices with minor changes. In applications such as NMR spectroscopy, it can be used as a transceiver planar PCB coil. In this design, at frequencies of 915 MHz and 40 MHz with 5 mm between coils, we received powers of 287.3 μW and 480 μW, respectively, which are suitable for an NMR coil or RF-EH system.

• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.113-118
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• 2011

According to the high accuracy of semiconductor equipments, PCB substrate with much thin thickness is required. However, it is very difficult to sustain the PCB substrate without deformation in case of horizontal installation, due to low bending stiffness. In this research, new PCB process equipment with vertical installation has been developed in order to solve the problem of PCB substrate damage during etching process. As the main parts of etching system on PCB substrate, PCB substrate and JIG are analyzed through finite element method and experimental test. Through the analysis results of stress state, we could find the optimal JIG design to make the damage as low as possible.

• Journal of IKEEE
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• v.25 no.4
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• pp.591-597
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• 2021

This paper proposes an EMC-aware PCB design method to reduce electromagnetic emission, where trace length and teturn path of critical signal are shortened by changing chip location and trace layout on the PCB, while additional filters or decoupling capacitors are not required. In the proposed method, signal velocity is calculated for various signals on the PCB. Critical signal with the fastest signal velocity is determined and its return path is shortened as much as possible by placing chip location and trace routing first. Return path of critical signal should be carefully designed not to have discontinuity. Power plane and ground plane should be carefully designed not to be divided, since these planes are the reference of return path. The proposed method was applied to automotive directional Bluetooth speaker which failed to pass CISPR 32 and CISPR 25 EMC tests. Its PCB was redesigned based on the proposed method and it easily passed the EMC tests. The proposed method is useful to EMC-sensitive electronic equipments.