• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.270-271
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• 2008

The contact resistance between organic semiconductor and source-drain electrode in Bottom Contact Organic Thin-Film Transistors (BCOTFTs) can be effectively reduced by metal oxide/molybdenum double layer structure; metal oxide layers including nickel oxide (NiOx/Mo) and moly oxide(MoOx) under molybdenum work as a high performance carrier injection layer. Step profiles of source-drain electrode can be easily achieved by simultaneous etching of the double layers using the difference etching rate between metal oxides and metal layers.

• Journal of the Korean institute of surface engineering
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• v.27 no.2
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• pp.83-90
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• 1994

We have investigated the mechanism for the abnormal oxide growth occuring during oxidation of the crystalline tungsten silicide. TEM and XPS analysis reveal the abnormaly grown oxide layer consisting of crystalline $Wo_3$ and amorphous $SiO_2$. The presence of crystalline $Wo_3$ provides a rapid diffusion of oxygen through the oxide layer. The abnormal oxide growth is mainly due to the poor quality of initial oxide layer growth on tungsten silicide. Two species such as tungsten and silicon from decomposition fo tungsten silicide as well as silicon supplied from the underlying polysilicon are the main contributors sto abnormal oxide forma-tion. Consequently, the abnormal oxidation results in the disintegration of tungsten silicide and thinning of polysilicon as well.

• Electrical & Electronic Materials
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• v.7 no.3
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• pp.231-235
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• 1994

The multi-dielectric layer $SiO_2$/$Si_3{N_4}$/$SiO_2$ (ONO) is used to improve charge retention and to scale down the memory device. The nitride layer of MNOS device is oxidize to form ONO system. During the oxidation of the nitride layer, the change of thickness of nitride layer and generation of interface state between nitride layer and top oxide layer occur. In this paper, effects of oxidation of the nitride layer is studied. The decreases of the nitride layer due to oxidation and trapping characteristics of interface state of multi layer dielectric film are investigated through the C-V measurement and F-N tunneling injection experiment using SONOS capacitor structure. Based on the experimental results, carrier trapping model for maximum flatband voltage shift of multi layer dielectric film is proposed and compared with experimental data. As a results of curve fitting, interface trap density between the top oxide and layer is determined as being $5{\times}10^11$~$2{\times}10^12$[$eV^1$$cm^2$].

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1047-1050
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• 2009

The two approaches to improve the stability of oxide TFTs are described. First approach is the optimization of device architecture including MIS structure and passivation layer using conventional InGaZnO semiconductor channel layer. Second approach is to develop the new kinds of oxide semiconductor materials, which is very robust and stable against the gate bias stress and thermal stress.

• Korean Journal of Materials Research
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• v.26 no.3
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• pp.109-116
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• 2016

To achieve the fabrication of high-quality Ag-coated Cu particles through a wet chemical process, we reported herein pretreatment conditions using an ammonium-based mixed solvent for the removal of a $Cu_2O$ layer on Cu particles that were oxidized in air for 1 hr at $200^{\circ}C$ or for 3 days at room temperature. Furthermore, we discussed the results of post-Ag plating with respect to removal level of the oxide layer. X-ray diffraction results revealed that the removal rate of the oxide layer is directly proportional to the concentration of the pretreatment solvent. With the results of Auger electron spectroscopy using oxidized Cu plates, the concentrations required to completely remove 50-nm-thick and 2-nm-thick oxides within 5 min were determined to be X2.5 and X0.13. However, the optimal concentrations in an actual Ag plating process using Cu powder increased to X0.4 and X0.5, respectively, because the oxidation in powder may be accelerated and the complete removal of oxide should be tuned to the thickest oxide layer among all the particles. Back-scattered electron images showed the formation of pure fine Ag particles instead of a uniform and smooth Ag coating in the Ag plating performed after incomplete removal of the oxide layer, indicating that the remaining oxide layer obstructs heterogeneous nucleation and plating by reduced Ag atoms.

• 한국신재생에너지학회:학술대회논문집
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• 2011.11a
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• pp.84.1-84.1
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• 2011

Typical solid oxide fuel cells (SOFCs) have limited applications because they operate at high temperature due to low ionic conductivity of electrolyte. Thin film solid oxide fuel cell with yttria stabilized zirconia (YSZ) electrolyte is developed to decrease operating temperature. Pt/YSZ/Pt thin film SOFC was fabricated on anodic aluminum oxide (AAO). The crystalline structure of YSZ electrolyte by sputter is heavily depends on the roughness of porous Pt layer, which results in pinholes. To deposit YSZ electrolyte without pinholes and electrical shortage, it is necessary to deposit smoother and denser layer between Pt anode layer and YSZ layer by sputter. Atomic Layer Deposition (ALD) technique is used to deposit pre-YSZ layer, and it improved electrolyte quality. 300nm thick Bi-layered YSZ electrolyte was successfully deposited without electrical shortage.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.308-309
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• 2016

Reducing surface recombination is a critical factor for high efficiency silicon solar cells. The passivation process is for reducing dangling bonds which are carrier. Tunnel oxide layer is one of main issues to achieve a good passivation between silicon wafer and emitter layer. Many research use wet-chemical oxidation or thermally grown which the highest conversion efficiencies have been reported so far. In this study, we deposit ultra-thin tunnel oxide layer by PECVD (Plasma Enhanced Chemical Vapor Deposition) using $N_2O$ plasma. Both side deposit tunnel oxide layer in different RF-power and phosphorus doped a-Si:H layer. After deposit, samples are annealed at $850^{\circ}C$ for 1 hour in $N_2$ gas atmosphere. After annealing, samples are measured lifetime and implied Voc (iVoc) by QSSPC (Quasi-Steady-State Photo Conductance). After measure, samples are annealed at $400^{\circ}C$ for 30 minute in $Ar/H_2$ gas atmosphere and then measure again lifetime and implied VOC. The lifetime is increase after all process also implied VOC. The highest results are lifetime $762{\mu}s$, implied Voc 733 mV at RF-power 200 W. The results of C-V measurement shows that Dit is increase when RF-power increase. Using this optimized tunnel oxide layer is attributed to increase iVoc. As a consequence, the cell efficiency is increased such as tunnel mechanism based solar cell application.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.252-253
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• 2011

ZnO-based thin film transistors (TFTs) are of great interest for application in next generation flat panel displays. Most research has been based on amorphous indium-gallium-zinc-oxide (IGZO) TFTs, rather than single binary oxides, such as ZnO, due to the reproducibility, uniformity, and surface smoothness of the IGZO active channel layer. However, recently, intrinsic ZnO-TFTs have been investigated, and TFT- arrayss have been demonstrated as prototypes of flat-panel displays and electronic circuits. However, ZnO thin films have some significant problems for application as an active channel layer of TFTs; it was easy to change the electrical properties of the i-ZnO thin films under external conditions. The variable electrical properties lead to unstable TFTs device characteristics under bias stress and/or temperature. In order to obtain higher performance and more stable ZnO-based TFTs, HZO thin film was used as an active channel layer. It was expected that HZO-TFTs would have more stable electrical characteristics under gate bias stress conditions because the binding energy of Hf-O is greater than that of Zn-O. For deposition of HZO thin films, Hf would be substituted with Zn, and then Hf could be suppressed to generate oxygen vacancies. In this study, the fabrication of the oxide-based TFTs with HZO active channel layer was reported with excellent stability. Application of HZO thin films as an active channel layer improved the TFT device performance and bias stability, as compared to i-ZnO TFTs. The excellent negative bias temperature stress (NBTS) stability of the device was analyzed using the HZO and i-ZnO TFTs transfer curves acquired at a high temperature (473 K).

• Journal of the Korean Electrochemical Society
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• v.5 no.2
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• pp.43-46
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• 2002

Commercial titanium rod was anodized in three types of electrolytes such as 0.06 mol/L $\beta-glycerophosphate+0.3mol/L$ calcium acetate, 0.06mol/L $\beta-glycerophosphate+0.3mol/L$ sodium acetate and 0.06 mol/L $\beta-glycerophosphate+5mol/L$ calcium phosphate. The titanium oxide layer $(TiO_2)$ was characterized by scanning electron microscope (SEM), X-ray diffraction (XRD) and electron spectroscopy chemical analysis (ESCA). Numerous micropores were observed on the titanium oxide layer by SEM. The diameter of micropores increased with the increase of electrolytic voltage. The titanium oxide layer was composed of anatase structure. The phosphorous element was detected at 130 eV binding energy, but calcium was not found in the oxide layer because of lower contents. After anodizing the oxide layer was etched in the 30g/L NaOH solution at $80^{\circ}C$ for 1hr. The surroundings of micropores were much more smoothed and rounded than before alkaline etching.

• Journal of Welding and Joining
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• v.19 no.3
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• pp.305-310
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• 2001

UBM-coated Si-wafer was fluxlessly soldered with glass substrate in $N_2$ atmosphere using plasma cleaning method. The bulk Sn-37wt.%Pb solder was rolled to the sheet of $100\mu\textrm{m}$ thickness in order to bond a solder disk by fluxless 1st reflow process. The oxide layer on the solder surface was analysed by AES(Auger Electron Spectroscopy). Through rolling, the oxide layer on the solder surface became thin, and it was possible to bond a solder disk on the Si-wafer with fluxless process in $N_2$ gas. The Si-wafer with a solder disk was plasma-cleaned in order to remove oxide layer formed during 1st reflow and soldered to glass by 2nd reflow process without flux in $N_2$ atmosphere. The thickness of oxide layer decreased with increasing plasma power and cleaning time. The optimum plasma cleaning condition for soldering was 500W 12min. The joint was sound and the thicknesses of intermetallic compounds were less than $1\mu\textrm{m}$.