• The KIPS Transactions:PartC
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• v.9C no.4
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• pp.531-542
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• 2002

An input and output buffering ATM switch conventionally operates in either Queueloss mode or Backpressure mode. Recently, a new mode, which is called Hybrid mode, was proposed to overcome the drawbacks of Queueloss mode and Backpressure mode. In Hybrid mode, when both the destined output buffer and the originfted input buffer are full, a cell is dropped. This thesis analyzes the cell loss rate and the cell delay of Queueloss, Backpressure and Hybrid modes in a switch adopting output-port expansion scheme under uniform traffic. Output-port expansion scheme allows only one cell from an input buffer to be switched during one time slot. If several cells switch to a same destined output port, the number of maximum transfer cells is restricted to K (Output-port expansion ratio). The simulation results show that if an offered load is less than 0.9, Hybrid mode has lower cell loss rate than the other modes; otherwise, Queueloss mode illustrates the lowest cell loss rate, which is a different result from previous researches. However, the difference between Hybrid and Queueloss modes is comparably small. As expected, the average cell delay in Backpressure mode is lower than those of Queueloss mode and Hybrid mode, since the cell delay due to the retransmission of higher number of dropped cells in Backpressure mode is not considered.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.5
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• pp.1184-1195
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• 1998

In this paper, we compare vaious input-buffered ATM switch architectures in structures on input buffer and switching fabric, the resons for performance improvement and degradation, arbitration scheme and maximum throughput, and present comparative merits and demerits of each architecture under random and bursty traffic. We also analyze the prformance of combined architectures of windowing scheme, destination-queueing based input-port expansion schemeand output-port expansion scheme, and show that it is possible to achieve 100% throughput with combined scheme of destination-queueing based input-port expansion scheme and output-port expansio scheme when the number of output group is 2 and output port expansion ratio is 2.

• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.48-55
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• 1997

Advances in VLSI technology have brought us completely new design principles for the high-performance switching fabrics including ATM switches. From a practical point of view, port scalability of ATM switches emerges as an important issue while complexity and performance of the switches have been major issues in the switch design. In this paper, we propose a cost-effective approach to modular ATM switch design which provides the good scalability. Taking advantages of both time-division and space-division switch architectures, we propose a practically implementable large scale ATM switch architecture. We present a scalable shared buffer type switch for a building block and its expansion method. In our design, a large scale ATM switch is realized by interconnecting the proposed shared buffer switches in three stages. We also present an efficient control mechanism of the shared buffers, synchronization method for the switches in each stage, and a flow control between stages. It is believed that the proposed approach will have a significant impact on both improving the ATM switch performance and enhancing the scalability of the switch with a new cost-effective scheme for handling the traffic congestion. We show that the proposed ATM switch provides an excellent performance and that its cell delay characteristic is comparable to output queueing which provides the best performance in cell delay among known approaches.