• Title/Summary/Keyword: Output Matching Circuit

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Design of a New RF Built-In Self-Test Circuit for 5.25GHz SiGe Low Noise Amplifier (5.25GHz 저잡음 증폭기를 위한 새로운 고주파 BIST 회로 설계)

  • 류지열;노석호;박세현;박세훈;이정환
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2004.05b
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    • pp.635-641
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    • 2004
  • This paper presents a new low-cost RF Built-In Self-Test (BIST) circuit for measuring transducer voltage gain, noise figure and input impedance of 5.25GHa low noise amplifier (LNA). The BIST circuit is designed using 0.18${\mu}{\textrm}{m}$ SiGe technology. The test technique utilizes input impedance matching and output transient voltage measurements. The technique is simple and inexpensive. Total chip size has additional area of about 18% for BIST circuit.

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A Highly Integrated HBT Downconverter MMIC for Application to One-chip RF tranceiver solution (One-chip 고주파 단말기에의 응용을 위한 고집적 HBT 다운컨버터 MMIC)

  • Yun, Young
    • Journal of Advanced Marine Engineering and Technology
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    • v.31 no.6
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    • pp.777-783
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    • 2007
  • In this work, a highly integrated downconverter MMIC employing HBT(heterojunction bipolar transistor) was developed for application to one chip tranceiver solution of Ku-band commercial wireless communication system. The downconverter MMIC (monolithic microwave integrated circuit) includes mixer filter. amplifier and input/output matching circuit. Especially, spiral inductor structures employing SiN film were used for a suppression of LO and its second harmonic leakage signals. Concretely, they were properly designed so that the self-resonance frequency was accurately tuned to LO and its second harmonic frequency, and they were integrated on the downconverter MMIC.

A 60 GHz Medium Power Amplifier for Radio-over-Fiber System

  • Chang, Woo-Jin;Oh, Seung-Hyeub;Kim, Hae-Choen
    • ETRI Journal
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    • v.29 no.5
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    • pp.673-675
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    • 2007
  • We present the design and fabrication of a 60 GHz medium power amplifier monolithic microwave integrated circuit with excellent gain-flatness for a 60 GHz radio-over-fiber system. The circuit has a 4-stage structure using microstrip coupled lines instead of metal-insulator-metal capacitors for unconditional stability of the amplifier and yield enhancement. The gains of each stage of the amplifier are modified to provide broadband characteristics of input/output matching for the first and fourth stages and to achieve higher gains for the second and third stages to improve the gain-flatness of the amplifier for wideband.

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A DC~7GHz Ultrabroad-Band GaAs MESFET (DC~7GHz 초광대역 GaAs MESFET 증폭기)

  • 윤영철;장익수
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.3
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    • pp.34-42
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    • 1993
  • An analytic approach to wide-band amplification using simplified equivalent MESFET modeling has enabled an ultrabroad-band flat-gain amplifier from DC to microwave. The developed lossy-match ultrabroad-band amplifier operates as a RC coupled circuit in the low-frequency range and lossless impedance matching circuit in the microwave frequency range with gain compensation circuits. The reduced gain caused by external resistors is compensated using 2-stage cascade amplification, and the gain of designed unit is 12.5.+-.1dB from the vicinity of DC to 7GAz. The experimental gain characteristics are good agreement with computer simulated results. The input and output VSWRs are measured under 2:1 over the operating frequency range, and the gain goes down over 15dBrange with various gate bias voltages.

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Design of Multi-Band Low Noise Amplifier Using Switching Transistors for 2.4/3.5/5.2 GHz Band (스위칭 트랜지스터를 이용하여 2.4/3.5/5.2 GHz에서 동작하는 다중 대역 저잡음 증폭기 설계)

  • Ahn, Young-Bin;Jeong, Ji-Chai
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.2
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    • pp.214-219
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    • 2011
  • This paper presents a multi-band low noise amplifier(LNA) with switching operation for 2.4, 3.5 and 5.2 GHz bands using CMOS 0.18 um technology. The proposed circuit uses switching transistors to achieve the input and output matching for multi-band. By using the switching transistors, we can adjust the transconductance, gate inductance and gatesource capacitance at input stage and total output capacitance at output stage. The proposed LNA exhibits gain of 14.2, 12 and 11 dB and noise figure(NF) of 3, 2.9 and 2.8 dB for 2.4, 3.5 and 5.2 GHz, respectively.

Implementation of 880Mbps ATE Pin Driver using General Logic Driver (범용 로직 드라이버를 이용한 880Mbps ATE 핀 드라이버 구현)

  • Choi Byung-Sun;Kim Jun-Sung;Kim Jong-Won;Jang Young-Jo
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.1 s.14
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    • pp.33-38
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    • 2006
  • The ATE driver to test a high speed semiconductor chip is designed by using general logic drivers instead of dedicated pin drivers. We have proposed a structure of general logic drivers using FPCA and assured its correct operation by EDA tool simulation. PCB circuit was implemented and Altera FPGA chip was programmed using DDR I/O library. On the PCB, it is necessary to place two resistors connected output drivers near to the output pin to adjust an impedance matching. We confirmed that the measured results agree with the simulated values within 5% errors at room temperature for the input signals with 800Mbps data transfer rate and 1.8V operating voltage.

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Design of High Efficiency Switching Mode Class E Power Amplifier and Transmitter for 2.45 GHz ISM Band (2.45 GHz ISM대역 고효율 스위칭모드 E급 전력증폭기 및 송신부 설계)

  • Go, Seok-Hyeon;Koo, Kyung-Heon
    • Journal of Advanced Navigation Technology
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    • v.24 no.2
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    • pp.107-114
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    • 2020
  • A power amplifier of 2.4 GHz ISM band is designed to implement a transmitter system. High efficiency amplifiers can be implemented as class E or class F amplifiers. This study has designed a 20 W high efficiency class E amplifier that has simple circuit structure in order to utilize for the ISM band application. The impedance matching circuit was designed by class E design theory and circuit simulation. The designed amplifier has the output power of 44.2 dBm and the power added efficiency of 69% at 2.45 GHz. In order to apply 30 dBm input power to the designed power amplifier, voltage controlled oscillator (VCO) and driving amplifier have been fabricated for the input feeding circuit. The measurement of the power amplifier shows 43.2 dBm output and 65% power added efficiency. This study can be applied to the design of power amplifiers for various wireless communication systems such as wireless power transfer, radio jamming device and high power transmitter.

High Gain and High Efficiency Class-E Power Amplifier Using Controlling Drain Bias for WPT (드레인 조절회로를 이용한 무선전력전송용 고이득 고효율 Class-E 전력증폭기 설계)

  • Kim, Sanghwan;Seo, Chulhun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.9
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    • pp.41-45
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    • 2014
  • In this paper, a high-efficiency power amplifier is implemented by using a drain bias control circuit operated at low input power for WPT(Wireless Power Transfer). Adaptive bias control circuit was added to high-efficiency class-E amplifier. It was possible to obtain the overall improvement in efficiency by adjusting the drain bias at low input power. The proposed adaptive class-E amplifier is implemented by using the input and output matching network and serial resonant circuit for improvement in efficiency. Drain bias control circuit consists of a directional coupler, power detector, and operational amplifier for adjusting the drain bias according to the input power. The measured results show that output powers of 41.83 dBm were obtained at 13.56 MHz. At this frequency, we have obtained the power added efficiency(PAE) of 85.67 %. It was confirmed increase of PAE of an average of 8 % than the fixed bias from the low input power level of 0 dBm ~ 6 dBm.

Design of MMIC power amplifier using double tuned matching (Double tuned matching에 의한 MMIC 광대역 전력 증폭기의 설계)

  • 김진성;채연식;윤용순;이진구
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2000.11a
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    • pp.150-153
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    • 2000
  • In this paper, we have designed a 2 stage MMIC power amplifier which has flat gains of in-band and reasonable out-band cutoff characteristics using 0.5$\mu\textrm{m}$ MESFET libra교 of ETRI. For the 1st stave, we obtaind P$_{1dB}$ of 9.2 dBm and gain 10.8 dB using 6 finger D-MESFET and P$_{1dB}$ of 18.4 dBm and gain of 10.8 dB using 14 finger D-MESFET for the 2nd stage, which is power matched using LIBRA's embedded TUNER. Also in-band gain flatness and out-band cutoff characteristics are obtained by attaching LC tank in the output matching circuit. The designed 2 stage MMIC power amplifier has bandwidth of 0.95~2.8 GHz, gain of 20 dB and P$_{1dB}$of 17.2 dBm. Especially gain flatness of $\pm$0.8dB was obtained in 1.8~2.5 GHz frequency ranges. And chip size is 1.4$\times$1.4 mm..4 mm.

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E-band low-noise amplifier MMIC with impedance-controllable filter using SiGe 130-nm BiCMOS technology

  • Chang, Woojin;Lee, Jong-Min;Kim, Seong-Il;Lee, Sang-Heung;Kang, Dong Min
    • ETRI Journal
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    • v.42 no.5
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    • pp.781-789
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    • 2020
  • In this study, an E-band low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) has been designed using silicon-germanium 130-nm bipolar complementary metal-oxide-semiconductor technology to suppress unwanted signal gain outside operating frequencies and improve the signal gain and noise figures at operating frequencies. The proposed impedance-controllable filter has series (Rs) and parallel (Rp) resistors instead of a conventional inductor-capacitor (L-C) filter without any resistor in an interstage matching circuit. Using the impedance-controllable filter instead of the conventional L-C filter, the unwanted high signal gains of the designed E-band LNA at frequencies of 54 GHz to 57 GHz are suppressed by 8 dB to 12 dB from 24 dB to 26 dB to 12 dB to 18 dB. The small-signal gain S21 at the operating frequencies of 70 GHz to 95 GHz are only decreased by 1.4 dB to 2.4 dB from 21.6 dB to 25.4 dB to 19.2 dB to 24.0 dB. The fabricated E-band LNA MMIC with the proposed filter has a measured S21 of 16 dB to 21 dB, input matching (S11) of -14 dB to -5 dB, and output matching (S22) of -19 dB to -4 dB at E-band operating frequencies of 70 GHz to 95 GHz.