• Title/Summary/Keyword: Organic pentacene

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A Study of Soluble Pentacene Thin Film for Organic Thin Film Transistor (유기박막트랜지스터 적용을 위한 Soluble Pentacene 박막의 특성연구)

  • Gong, Su-Cheol;Lim, Hun-Seong;Shin, Ik-Sub;Park, Hyung-Ho;Jeon, Hyeong-Tag;Chang, Young-Chul;Chang, Ho-Jung
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.3
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    • pp.1-6
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    • 2007
  • In this study, the pentacene thin films were prepared by the soluble process, and characterized fur the application of the organic thin film transistor(OTFT) device. To dissolve the pentacene material, two kinds of solvents such as toluene and chloroform were used, and the effects of these solvents on the properties of pentacene thin films coated on ITO/Glass substrate were investigated. Pentacene thin films were prepared by using spin-coating methode and characterized the surface morphology, crystalline and electrical properties. From the AFM measurement, the surface morphology of the pentacene film dissolved with chloroform was improved compared with the one dissolved with toluene solvent. XRD measurement showed that all prepared pentacene film samples were amorphous crystal phases without crystallization of the films. The electrical properties of the pentacene film dissolved with chloroform showed better results than the ones using toluene solvent by hall measurement system. The carrier concentration and the mobility values of pentacene films using chloroform solvent were found to be $-3.225{\times}10^{14}\;cm^{-3}$ and $3.5{\times}10^{-1}\;cm^2{\cdot}V^{-1}{\cdot}S^[-1}$, respectively. The resistivity was about $2.5{\times}10^2\;{\Omega}{\cdot}cm$.

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An Electrical Characteristics on the Pentacene-Based Organic Thin-Film Transistors using PVA Alignment Layer (PVA 배열층을 이용한 펜타신 유기 박막 트랜지스터의 전기적 특성)

  • Jun, Hyeon-Sung;Oh, Hwan-Sool
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.3
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    • pp.177-182
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    • 2010
  • The pentacene-based organic thin film transistors(OTFTs) using polyvinylalcohol(PVA) alignment layer were fabricated on the $SiO_2$ evaporated to n-type (111) Si substrates. The pentacene film was deposited by thermally evaporated at $10^{-7}$ torr. X-ray diffraction (XRD) and atomic force microscope(AFM) measurement showed pentacene film which deposited on rubbed PVA layers were partially crystallized at (001) plane. The pentacene OTFTs with PVA layers rubbed perpendicular to the direction of current flow was shown to align better orientation than parallel rubbed case and thus to enhance the mobility and saturation current by a factor of 2.3 respectively. We obtained mobility by 0.026 $cm^2$/Vs and on-off current ratio by ${\sim}10^8$.

Characteristics of Pentacene Organic Thin-Film Transistors with Different Polymer Gate Insulators (Polymer Gate Insulators에 따른 Pentacene Organic Thin-Film Transistors의 특성 분석)

  • Kim, Jung-Min;Her, Hyun-Jung;Yoon, J.H.;Kim, Jae-Wan;Choi, Y.S.;Kang, C.J.;Jeon, D.;Kim, Yong-Sang
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1434-1435
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    • 2006
  • 본 연구에서는 polymer gate insulators에 따른 pentacene 유기 박막 트랜지스터 (Organic Thin-Film Transistors)의 전기적 특성을 atom force microscope (AFM), x-ray diffraction (XRD) 그리고 I-V 측정을 이용하여 분석하였다. Pentacene 박막 트랜지스터의 전기적 특성은 pentacene의 증착 조건뿐만 아니라 polymer gate insulator에 따라 크게 영향을 받는다. 따라서 다양한 polymer 기판 위에 온도, 두께 그리고 증착 속도에 따라 pentacene을 증착 하였다. 그리고 증착된 pentacne을 AFM, XRD를 이용하여 pentacene의 구조, 결정화 그리고 grain 크기 등을 분석하였다. 또한 inverted stagger며 구조의 pentacene 박막 트랜지스터 소자를 제작하고 I-V 측정하여 그 결과를 분석하였다.

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Organic Thin Film-Transistor using Pentacene

  • Kim, Seong-Hyun;Hwang, Do-Hoon;Park, Heuk;Chu, Hye-Young;Lee, Jeong-Ik;Do, Lee-Mi;Zyung, Tae-Hyoung
    • 한국정보디스플레이학회:학술대회논문집
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    • 2000.01a
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    • pp.215-216
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    • 2000
  • We fabricated the thin-film transistors using organic semiconductor, pentacene, on $SiN_x$, gate insulator. X-ray diffraction experiments were performed for the sample after heat-treatments at higher temperatures. We confirmed that we obtained "thin-film phase" from the condition used here. From the electrical measurements, we also confirmed that no charges are accumulated at the interface between organic and insulating layer, and FET characteristics of the organic FET using pentacene was discussed.

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Fabrication of Pentacene Thin Film Transistors by using Organic Vapor Phase Deposition System (Organic Vapor Phase Deposition 방식을 이용한 펜타센 유기박막트랜지스터의 제작)

  • Jung Bo-Chul;Song Chung-Kun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.6
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    • pp.512-518
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    • 2006
  • In this paper, we investigated the deposition of pentacene thin film on a large area substrate by Organic Vapor Phase Deposition(OVPD) and applied it to fabrication of Organic Thin Film Transistor(OTFT). We extracted the optimum deposition conditions such as evaporation temperature of $260^{\circ}C$, carrier gas flow rate of 10 sccm and chamber vacuum pressure of 0.1 torr. We fabricated 72 OTFTs on the 4 inch size Si Wafer, Which produced the average mobility of $0.1{\pm}0.021cm^2/V{\cdot}s$, average subthreshold slope of 1.04 dec/V, average threshold voltage of -6.55 V, and off-state current is $0.973pA/{\mu}m$. The overall performance of pentacene TFTs over 4 ' wafer exhibited the uniformity with the variation less than 20 %. This proves that OVPD is a suitable methode for the deposition of organic thin film over a large area substrate.

Electrical characteristics of Pentacene thin film (Pentacene 박막의 전기적 특성에 관한 연구)

  • Kim, Dae-Yop;Kang, Do-Yol;Choi, Jong-Sun;Kim, Young-Kwan;Shin, Dong-Myung;Choi, Don-Su
    • Proceedings of the KIEE Conference
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    • 1999.07d
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    • pp.1950-1952
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    • 1999
  • Pentacene thin films are a component for active layer of Organic thin film transistors. Pentacene film was deposited by Organic Molecular Beam Deposition(OMBD) and electrodes were deposoted by vacuum evaporation. Electrical characterization of Pentacene films were measured by two probe methods, as the results. The Au/Pentacene/Al contact is Ohimic contact. Band diagram of pentacene films were measured by UV-spectrum and Cyclic-Voltammetry method.

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A Study on Space Charge of Organic Pentacene/metal Interface (유기물 Pentacene 박막과 금속 계면에서의 Space Charge 연구)

  • Yoon, Young-Woon;Babajayan, Arsen;Lee, Hoo-Neung;Kim, Song-Hui;Lee, Kie-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.1
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    • pp.41-46
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    • 2007
  • Surface potential properties at the interface of pentacene thin films on gold (Au) and aluminum (Al) surfaces were investigated by using a near-field scanning microwave microprobe (NSMM). The surface potential formed across the pentacene film was observed by measuring the microwave reflection coefficient $S_{11}$ and compared with the result of a Kelvin-probe method. The obtained reflection coefficient ${\Delta}S_{11}$ of the pentacene thin films on Al was decreased as the pentacene film thickness increased due to the increased accumulation of negative space charges, while for Au ${\Delta}S_{11}$ was essentially constant.

Morphology control of inkjet-printed small-molecule organic thin-film transistors with bank structures

  • Kim, Yong-Hoon;Park, Sung-Kyu
    • Journal of Information Display
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    • v.12 no.4
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    • pp.199-203
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    • 2011
  • Reported herein is the film morphology control of inkjet-printed 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) organic thin-film transistors for the improvement of their performance and of the device-to-device uniformity. The morphology of the inkjetted TIPS-pentacene films was significantly influenced by the bank geometry such as the bank shapes and confinement area for the channel region. A specific confinement size led to the formation of uniform TIPS-pentacene channel layers and better electrical properties, which suggests that the ink volume and the solid concentration of the organic-semiconductor solutions should be considered in designing the bank geometry.

The Effect of Thermal Annealing Process on Fermi-level Pinning Phenomenon in Metal-Pentacene Junctions

  • Cho, Hang-Il;Park, Jin-Hong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.290.2-290.2
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    • 2016
  • Recently, organic thin-film transistors have been widely researched for organic light-emitting diode panels, memory devices, logic circuits for flexible display because of its virtue of mechanical flexibility, low fabrication cost, low process temperature, and large area production. In order to achieve high performance OTFTs, increase in accumulation carrier mobility is a critical factor. Post-fabrication thermal annealing process has been known as one of the methods to achieve this by improving the crystal quality of organic semiconductor materials In this paper, we researched the properties of pentacene films with X-Ray Diffraction (XRD) and Atomic Force Microscope (AFM) analyses as different annealing temperature in N2 ambient. Electrical characterization of the pentacene based thin film transistor was also conducted by transfer length method (TLM) with different annealing temperature in Al- and Ti-pentacene junctions to confirm the Fermi level pinning phenomenon. For Al- and Ti-pentacene junctions, is was found that as the surface quality of the pentacene films changed as annealing temperature increased, the hole-barrier height (h-BH) that were controlled by Fermi level pinning were effectively reduced.

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