• Journal of Adhesion and Interface
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• v.20 no.4
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• pp.155-161
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• 2019

Understanding charge transport anisotropy at the interface of conjugated nanostructures basically gives insight into structure-property relationship in organic field-effect transistors (OFET). Here, the anisotropy of the field-effect mobility at the interface between 6,13-bis(triisopropylsilylethynyl) pentacene (TIPS-pentacene) single crystal with cofacial molecular stacks in a-b basal plane and SiO gate dielectric was investigated. A solvent exchange method has been used in order for TIPS-pentacene single crystals to be grown on the surface of SiO₂ thin film, corresponding to the charge accumulation at the interface in OFET structure. In TIPS-pentacene OFET, the anisotropy ratio between the highest and lowest measured mobility is revealed to be 5.2. By analyzing the interaction of a conjugated unit in TIPS-pentacene with the nearest neighbor units, the mobility anisotropy can be rationalized by differences in HOMO-level coupling and hopping routes of charge carriers. The theoretical estimation of anisotropy based on HOMO-level coupling is also consistent with the experimental result.

• Journal of Intelligence and Information Systems
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• v.28 no.4
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• pp.135-155
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• 2022

This study analyzes patent trends by deriving sub-technical fields of Organic Light-Emitting Diodes (OLEDs) industry, and analyzing technology value, originality, and diversity for each sub-technical field. To collect patent data, a set of international patent classification(IPC) codes related to OLED technology was defined, and OLED-related patents applied from 2005 to 2017 were collected using a set of IPC codes. Then, a large number of collected patent documents were classified into 12 major technologies using the Latent Dirichlet Allocation(LDA) topic model and trends for each technology were investigated. Patents related to touch sensor, module, image processing, and circuit driving showed an increasing trend, but virtual reality and user interface recently decreased, and thin film transistor, fingerprint recognition, and optical film showed a continuous trend. To compare the technological value, the number of forward citations, originality, and diversity of patents included in each technology group were investigated. From the results, image processing, user interface(UI) and user experience(UX), module, and adhesive technology with high number of forward citations, originality and diversity showed relatively high technological value. The results provide useful information in the process of establishing a company's technology strategy.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.5-5
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• 2009

Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

• Journal of the Korean Vacuum Society
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• v.17 no.5
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• pp.435-441
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• 2008

In this paper, we investigated the electrical properties of triisopropylsilyl (TIPS) pentacene organic thin-film transistor (OTFT) depending on solvent type. We spin coated TIPS pentacene by using chlorobenzene, p-xylene, chloroform, and toluene as solvents. Fabricated OTFT with chlorobenzene shows field-effect mobility of $1.0{\times}10^{-2}cm^2/V{\cdot}s$, on/off ratio of $4.3{\times}10^3$ and threshold voltage of 5.5 V. In contrast, with chloroform, the mobility is $5.8{\times}10^{-7}cm^2/V{\cdot}s$, on/off ratio of $1.1{\times}10^2$ and threshold voltage of 1.7 V. Moreover we measured the grain size of each TIPS pentacene solvent by atomic force microscopy (AFM). From these results, it can be concluded that a solvent with higher boiling point results in better electrical characteristics due to large grain size and high crystallinity of TIPS pentacene layer. In this paper TIPS pentacene with chlorobenzene shows the best electrical properties.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.421-427
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• 2009

We successfully fabricated 4.7-inch organic thin film transistors array with $640{\times}480$ pixels on flexible substrate. All the processes were done by photolithography, spin coating and ink-jet printing. The OTFT-Electrophoretic (EP) pixel structure, based on a top gate OTFT, was fabricated. The mobility, ON/OFF ratio, subthreshold swing and threshold voltage of OTFT on flexible substrate are: 0.01 ^2/V-s, 1.3 V/dec, 10E5 and -3.5 V. After laminated the EP media on OTFT array, a panel of 4.7-inch $640{\times}480$ OTFT-EPD was fabricated. All of process temperature in OTFT-EPD is lower than $150^{\circ}C$. The pixel size in our panel is $150{\mu}m{\times}150{\mu}m$, and the aperture ratio is 50 %. The OTFT channel length and width is 20 um and 200um, respectively. We also used OTFT to drive EP media successfully. The operation voltages that are used on the gate bias are -30 V during the row data selection and the gate bias are 0 V during the row data hold time. The data voltages that are used on the source bias are -20 V, 0 V, and 20 V during display media operation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.1
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• pp.12-16
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• 2011

In this study, we fabricated the flexible pentacene TFTs with the polymer gate dielectric and contact printing method by using the silver nano particle ink as a source/drain material on plastic substrate. In this experiment, to lower the cross-linking temperature of the PVP gate dielectric, UV-Ozone treatment has been used and the process temperature is lowered to $90^{\circ}C$ and the surface is optimized by various treatment to improve device characteristics. We tried various surface treatments; $O_2$ Plasma, hexamethyl-disilazane (HMDS) and octadecyltrichlorosilane (OTS) treatment methods of gate dielectric/semiconductor interface, which reduces trap states such as -OH group and grain boundary in order to improve the OTFTs properties. The optimized OTFT shows the device performance with field effect mobility, on/off current ratio, and the sub-threshold slope were extracted as $0.63cm^2 V^{-1}s^{-1}$, $1.7{\times}10^{-6}$, and of 0.75 V/decade, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

• Journal of Korean Society of Industrial and Systems Engineering
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• v.40 no.1
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• pp.114-123
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• 2017

The global small and mid-sized display market is changing from thin film transistor-liquid crystal display to organic light emitting diode (OLED). Reflecting these market conditions, the domestic and overseas display panel industry is making great effort to innovate OLED technology and incease productivity. However, current OLED production technology has not been able to satisfy the quality requirement levels by customers, as the market demand for OLED is becoming more and more diversified. In addition, as OLED panel production technology levels to satisfy customers' requirement become higher, product quality problems are persistently generated in OLED deposition process. These problems not only decrease the production yield but also cause a second problem of deteriorating productivity. Based on these observations, in this study, we suggest TRIZ-based improvement of defects caused by glass pixel position deformation, which is one of quality deterioration problems in small and medium OLED deposition process. Specifically, we derive various factors affecting the glass pixel position shift by using cause and effect diagram and identify radical reasons by using XY-matrix. As a result, it is confirmed that glass heat distortion due to the high temperature of the OLED deposition process is the most influential factor in the glass pixel position shift. In order to solve the identified factors, we analyzed the cause and mechanism of glass thermal deformation. We suggest an efficient method to minimize glass thermal deformation by applying the improvement plan of facilities using contradiction matrix in TRIZ. We show that the suggested method can decrease the glass temperature change by about 23% through an experiment.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.758-760
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• 2007

Organic field-effect transistors (OFETs) are of interest for use in widely area electronic applications. We fabricated a copper phthalocyanine (CuPc) based field-effect transistor with different metal electrode. So we need the effect of the substituent group attached to the phthalocyanine on the surface potential was investigated by Kelvin probe method with varying temperature of the substrate. We were obtained the positive shift of the surface potential for CuPc thin film. We observed the electron displacement at the interface between Au electrode and CuPc layer and we were confirmed by the surface potential measurement.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.61-63
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• 2005

Pentacene based OTFT on PC and PES plastic substrates have been fabricated in a scale of 5 inches. We could get a small OTFT device enough to be applicable for AMOLED by acquiring the at least misalignment margin through a contact aligner. And also we could find out the degradation of device parameter through the integration processes and improve the properties by using a buffer layer as an etch stopper in an active patterning. Through these, the mobility of device is more than about $0.2cm^2/Vs$ and $I_{on}/I_{off}$ is higher than $10^5$.