• 제목/요약/키워드: Optimized implementation

검색결과 511건 처리시간 0.029초

포토폴리머 기반의 다시점 VHOE 광학판 구현을 위한 최적 노출시간 스케줄링 기법 (Optimized Exposure-time Scheduling scheme for Implementation of the Photopolymer-based Multiview VHOE)

  • 김승철;구정식;조병철;김은수
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 춘계학술대회 논문집 디스플레이 광소자 분야
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    • pp.132-135
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    • 2002
  • In this paper, a new method to implement the photopolymer-based VHOE using the optimized exposure time schedule is proposed. The cumulative grating strength dependence on the exposure energy is mathematically modeled by using the fourth-order polynomial function and then using this model, the optimized exposure-time schedule of the photopolymer for recording the given multiple gratings is calculated.

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안정성을 고려한 동적 신경망의 최적화와 비선형 시스템 제어기 설계 (Optimization of Dynamic Neural Networks Considering Stability and Design of Controller for Nonlinear Systems)

  • 유동완;전순용;서보혁
    • 제어로봇시스템학회논문지
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    • 제5권2호
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    • pp.189-199
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    • 1999
  • This paper presents an optimization algorithm for a stable Self Dynamic Neural Network(SDNN) using genetic algorithm. Optimized SDNN is applied to a problem of controlling nonlinear dynamical systems. SDNN is dynamic mapping and is better suited for dynamical systems than static forward neural network. The real-time implementation is very important, and thus the neuro controller also needs to be designed such that it converges with a relatively small number of training cycles. SDW has considerably fewer weights than DNN. Since there is no interlink among the hidden layer. The object of proposed algorithm is that the number of self dynamic neuron node and the gradient of activation functions are simultaneously optimized by genetic algorithms. To guarantee convergence, an analytic method based on the Lyapunov function is used to find a stable learning for the SDNN. The ability and effectiveness of identifying and controlling a nonlinear dynamic system using the proposed optimized SDNN considering stability is demonstrated by case studies.

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GF($q^n$)상의 병렬 승산기 설계를 위한 기약다항식에 관한 연구 (A Study on Irreducible Polynomial for Construction of Parallel Multiplier Over GF(q$^{n}$ ))

  • 오진영;김상완;황종학;박승용;김홍수
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 하계종합학술대회 논문집
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    • pp.741-744
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    • 1999
  • In this paper, We represent a low complexity of parallel canonical basis multiplier for GF( q$^{n}$ ), ( q> 2). The Mastrovito multiplier is investigated and applied to multiplication in GF(q$^{n}$ ), GF(q$^{n}$ ) is different with GF(2$^{n}$ ), when MVL is applied to finite field. If q is larger than 2, inverse should be considered. Optimized irreducible polynomial can reduce number of operation. In this paper we describe a method for choosing optimized irreducible polynomial and modularizing recursive polynomial operation. A optimized irreducible polynomial is provided which perform modulo reduction with low complexity. As a result, multiplier for fields GF(q$^{n}$ ) with low gate counts. and low delays are constructed. The architectures are highly modular and thus well suited for VLSI implementation.

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Implementation of the VHOE-based Multiview 3D Display System by using Optimized Exposure-Time Scheduling Scheme

  • Kim, Seung-Chul;Gu, Jung-Sik;Kim, Eun-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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    • pp.883-886
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    • 2002
  • A new exposure time scheduling scheme to implement the optimized photopolymer-based VHOE is proposed and using this method, the 8-view VHOE system is experimentally developed. The CGS dependence on the exposure energy is mathematically modeled using the fourth-order polynomial function and using this model optimized exposure-time schedule for recording the given multiple gratings in the photopolymer is calculated. In addition, basing on this suggested exposure-time schedule, 8-view VHOE is finally implemented and its performance is discussed.

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Optimized Algebra LDPC Codes for Bandwidth Efficient Modulation

  • Hwang, Gi-Yean;Yu Yi;Lee, Moon-Ho
    • Journal of electromagnetic engineering and science
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    • 제4권1호
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    • pp.17-22
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    • 2004
  • In this paper, we implement an efficient MLC/PDL system for AWGN channels. In terms of the tradeoff between the hardware implementation and system performance, proposed algebra LDPC codes are optimized by the Gaussian approximation(GA) according to the rate of each level assigned by the capacity rule and chosen as the component code. System performance with Ungerboeck Partitioning(UP), Miked Partitioning(MP) and Gray Mapping(GM) of 8PSK are evaluated, respectively. Many results are presented in this paper; they can indicate that the proposed MLC/PDL system using optimized algebra LDPC codes with different code rate, capacity rule and Gray mapping(GM) can achieve the best performance.

Computationally Efficient Implementation of a Hamming Code Decoder Using Graphics Processing Unit

  • Islam, Md Shohidul;Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of Communications and Networks
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    • 제17권2호
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    • pp.198-202
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    • 2015
  • This paper presents a computationally efficient implementation of a Hamming code decoder on a graphics processing unit (GPU) to support real-time software-defined radio, which is a software alternative for realizing wireless communication. The Hamming code algorithm is challenging to parallelize effectively on a GPU because it works on sparsely located data items with several conditional statements, leading to non-coalesced, long latency, global memory access, and huge thread divergence. To address these issues, we propose an optimized implementation of the Hamming code on the GPU to exploit the higher parallelism inherent in the algorithm. Experimental results using a compute unified device architecture (CUDA)-enabled NVIDIA GeForce GTX 560, including 335 cores, revealed that the proposed approach achieved a 99x speedup versus the equivalent CPU-based implementation.

Parallel Implementation of Scrypt: A Study on GPU Acceleration for Password-Based Key Derivation Function

  • SeongJun Choi;DongCheon Kim;Seog Chung Seo
    • Journal of information and communication convergence engineering
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    • 제22권2호
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    • pp.98-108
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    • 2024
  • Scrypt is a password-based key derivation function proposed by Colin Percival in 2009 that has a memory-hard structure. Scrypt has been intentionally designed with a memory-intensive structure to make password cracking using ASICs, GPUs, and similar hardware more difficult. However, in this study, we thoroughly analyzed the operation of Scrypt and proposed strategies to maximize computational parallelism in GPU environments. Through these optimizations, we achieved an outstanding performance improvement of 8284.4% compared with traditional CPU-based Scrypt computations. Moreover, the GPU-optimized implementation presented in this paper outperforms the simple GPU-based Scrypt processing by a significant margin, providing a performance improvement of 204.84% in the RTX3090. These results demonstrate the effectiveness of our proposed approach in harnessing the computational power of GPUs and achieving remarkable performance gains in Scrypt calculations. Our proposed implementation is the first GPU implementation of Scrypt, demonstrating the ability to efficiently crack Scrypt.

Three-level 하이브리드 몽고메리 감산을 통한 ARM Cortex-M7에서의 CSIDH-512 최적화 (Optimized Implementation of CSIDH-512 through Three-Level Hybrid Montgomery Reduction on ARM Cortex-M7)

  • 최영록;허동회;홍석희;김수리
    • 정보보호학회논문지
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    • 제33권2호
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    • pp.243-252
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    • 2023
  • NIST PQC 표준화 작업 Round 4에 올라 있던 유일한 아이소제니 기반 KEM 알고리즘인SIKE에대한효율적인 키 복구 공격이 발표됨에 따라, 이를 대체할 수 있는 키 교환 알고리즘인 CSIDH가 다시주목받고 있다. CSIDH는 현재까지 알려진 공격에 안전한 아이소제니 기반 키 교환 알고리즘으로, CRS 스킴을 현대화하여 효율적인 NIKE를 제공한다. 본 논문에서는 CSIDH-512를 ARM Cortex-M7에서 구현하고 three-level 하이브리드 몽고메리 감산을 적용하여 최적화한 성능을 측정한 뒤 그 결과 및 한계에 대해 서술하고 향후 연구방향을 제시한다. 이는 기존에 제시되지 않았던 32-bit 임베디드 기기에서의 CSIDH 구현으로, 향후 다양한 임베디드 환경에서CSIDH 및 파생 암호 알고리즘을 구현하는데 본 논문의 결과를 이용할 수 있을 것으로 기대한다.

최적 레이턴시 기반 공정 큐잉 방식의 개선에 관한 연구 (A study on Improving Latency-Optimized Fair Queuing Algorithm)

  • 김태준
    • 한국멀티미디어학회논문지
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    • 제10권1호
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    • pp.83-93
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    • 2007
  • 널리 이용되고 있는 공정 큐잉 방식인 WFQ(Weighted Fair Queuing)는 특히 인터넷 전화와 같이 저속이지만 엄격한 지연한계를 요구하는 서비스에 대해 대역폭 이용도가 저하되는 문제점을 갖고 있다. 이러한 WFQ의 문제점은 흐름의 레이턴시가 최적화되지 못하기 때문에 발생하는 것으로 최근에 밝혀졌고, 이어서 최적레이턴시 기반 공정 큐잉 방식인 LOFQ(Latency-Optimized Fair Queuing)가 도입되었다. 본 연구에서는 LOFQ에 점유자원 최적화 기능을 추가하여 성능특성을 더욱 개선하고, 반복적으로 수행되던 LOFQ의 자원변환 알고리즘을 개선하여 수행 복잡성을 줄인다. 아울러 WFQ에 비해 대역폭 이용도가 우수함을 증명한다. 시뮬레이션을 통해 성능개선 효과를 확인한 결과 $20{\sim}30%$의 개선이 있었다.

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최적 레이턴시 기반 공정 큐잉 알고리즘의 대역폭 이용도 (Bandwidth Utilization in Latency-Optimized Fair Queuing Algorithm)

  • 김태준
    • 정보처리학회논문지C
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    • 제14C권2호
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    • pp.155-162
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    • 2007
  • 널리 이용되고 있는 공정 큐잉 방식인 WFQ(Weighted Fair Queoing)는 특히 인터넷 전화와 같이 저속이지만 엄격한 지연한계를 요구하는 서비스에 대해 대역폭 이용도가 저하되는 고질적인 문제점을 갖고 있었다. 이러한 WFQ의 문제점은 흐름의 레이턴시가 최적화 되지 않았기 때문으로 최근에 밝혀졌고, 이어서 최적 레이턴시 기반 공정 큐잉 방식인 LOFQ(Latency-Optimized Fair Queuing)가 도입되었다. 그리고 LOFQ에 점유자원 최적화 기능을 추가하여 대역폭 이용도를 개선하고, 반복적으로 수행되던 자원변환 알고리즘을 개선하여 수행 복잡성을 줄이는 등 LOFQ의 성능특성이 향상되었다. 하지만 여전 시뮬레이션에 의해 성능을 평가하고 있어 평가의 정확성과 소요시간 측면에서 어려움이 있다. 따라서 본 연구에서는 LOFQ의 대역폭 이용도를 수학적으로 계산하는 방법을 연구하고자 한다.