• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.29 no.5
• /
• pp.263-267
• /
• 2016

In this paper, we analyzed the electrical characteristics of NPT planar and trench gate IGBT after designing these devices according to design and process parameter. To begin with, we have designed NPT planar gate IGBT and carried out simulation with T-CAD. Therefore, we extracted design and process parameter and obtained optimal electrical characteristics. The breakdown voltage was 724 V and The on state voltage drop was 1.746 V. The next was carried out optimal design of trench gate power IGBT. We did this research by same drift thickness and resistivity of planar gate power IGBT. As a result of experiment, we obtain 720 V breakdown voltage, 1.32 V on state voltage drop and 4.077 V threshold voltage. These results were improved performance and fabrication of trench gate power IGBT and planar gate Power IGBT.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.27 no.5
• /
• pp.328-341
• /
• 2014

The object of this paper is to develop optimal optical filter, which can be used to identify the financial account and read the information. The five factors which affect the performance of the optical filter are identified as optical glass type, existence of Fe, Photo pic coating type, and coating form. In this study we seek to determine the optimal combination for the best design of the optical filter. For each combination, the performances of optical filter are investigated using the proper experimental equipments and methods. White-state voltage, black-state voltage, and black-state error rate are used for the performance measures. Through the statistical analysis of the performance data collected, we have determined the optimal design of the optical filter.

• Proceedings of the KIEE Conference
• /
• 2003.11a
• /
• pp.472-474
• /
• 2003

This paper presents a contains contingency constrained Optimal Power Flow(CCOPF) algorithm. The proposed algorithm maintains the nodal voltage levels within the specified limits after contingency. A case study demonstrate the proposed algorithm with the IEEE-14RTS under N-1 contingency criterion.

• The Transactions of the Korean Institute of Electrical Engineers A
• /
• v.48 no.6
• /
• pp.699-703
• /
• 1999

It is known that the LDC(Line-Drop Compensator) becomes to lose the function of proper voltage regulation for its load currents due to the real and reactive power generated by DGS(Dispersed Generation System), when DGS is introduced into the power distribution system of which the voltage is controlled by LDC. Therefore, in that case, it is very difficult to regulate the distribution line voltage properly by using LDC. One possible solution for this problem is the real-time voltage regulation method which is to optimally regulate the sending-end voltage in real-time by collecting the real-time load data of each load data of each load section between measuring points and by calculating the optimal seding-end voltage value from them. For this, we must know the real-time load data of each load section. In this paper, a modeling method of representing a load section on high voltage line with DGSs as an equivalent lumped load is proposed for gaining the real-time load data. In addition a method of locating the measuring points is proposed. Then, these proposed methods are evaluated through computer simulations.

• Journal of Power Electronics
• /
• v.16 no.5
• /
• pp.1833-1842
• /
• 2016

In grid-connected converter control, grid voltage feedforward is usually introduced to suppress the influence of grid voltage distortion on the converter's grid-side AC current. However, owing to the time-delay in control systems, the suppression effect of the grid voltage distortion is seriously affected. In this paper, the positive effects of the grid voltage feedforward control are analyzed in detail, and the time-delay caused by the low-pass filter (LPF) in the voltage filtering circuits and digital control are summarized. In order to reduce the time-delay effect on the performance of the feedforward control, a voltage feedforward control strategy with time-delay compensation is proposed, in which, a leading correction of the feedforward voltage is used. The optimal leading step used in this strategy is derived from analyzing the phase-frequency characteristics of a LPF and the implementation of digital control. By using the optimal leading step, the delay in the feedforward path can be further counteracted so that the performance of the feedforward control in terms of suppressing the influence of grid voltage distortion on the converter output current can be improved. The validity of the proposed method is verified through simulation and experiment results.

• Journal of the Korean Society of Safety
• /
• v.32 no.6
• /
• pp.29-33
• /
• 2017

In order to solve this sort of electrostatic failure in Display and Semiconductor process, Soft X-ray ionizer is mainly used. Soft X-ray Ionizer does not only generate electrical noise and minute particle but also is efficient to remove electrostatic as it has a wide range of ionization. There exist variable factors such as type of tungsten thickness deposited on target, Anode voltage etc., and it takes a lot of time and financial resource to find optimal performance by manufacturing with actual X-ray tube source. Here, MCNPX (Monte Carlo N-Particle Extended) is used for simulation to solve this kind of problem, and optimum efficiency of X-ray generation is anticipated. In this study, X-ray generation efficiency was compared according to target material thickness using MCNPX and actual X-ray tube source under the conditions that tube voltage is 5 keV, 10 keV, 15 keV and the target Material is Tungsten(W). At the result, In Tube voltage 5 keV and distance 100 mm, optimal target thickness is $0.05{\mu}m$ and fastest decay time appears + decay time 0.28 sec. - deacy time 0.30 sec. In Tube voltage 10keV and distance 100 mm, optimal target Thickness is $0.16{\mu}m$ and fastest decay time appears + decay time 0.13 sec. - deacy time 0.12 sec. In the tube voltage 15 keV and distance 100 mm, optimal target Thickness is $0.28{\mu}m$ and fastest decay time appears + decay time 0.04 sec. - deacy time 0.05 sec.

• Journal of Electrical Engineering and Technology
• /
• v.6 no.6
• /
• pp.786-792
• /
• 2011

The present paper presents an optimal capacitor placement (OCP) algorithm for voltagestability enhancement. The OCP issue is represented using a mixed-integer problem and a highly nonlinear problem. The hybrid particle swarm optimization (HPSO) algorithm is proposed to solve the OCP problem. The HPSO algorithm combines the optimal power flow (OPF) with the primal-dual interior-point method (PDIPM) and ordinary PSO. It takes advantage of the global search ability of PSO and the very fast simulation running time of the OPF algorithm with PDIPM. In addition, OPF gives intelligence to PSO through the information provided by the dual variable of the OPF. Numerical results illustrate that the HPSO algorithm can improve the accuracy and reduce the simulation running time. Test results evaluated with the three-bus, New England 39-bus, and Korea Electric Power Corporation systems show the applicability of the proposed algorithm.

• International Journal of Korean Welding Society
• /
• v.1 no.1
• /
• pp.44-50
• /
• 2001

A genetic algorithm was applied to the arc welding process as to determine the near-optimal settings of welding process parameters that produce the good weld quality. This method searches for optimal settings of welding parameters through the systematic experiments without the need for a model between the input and output variables. It has an advantage of being capable to find the optimal conditions with a fewer number of experiments rather than conventional full factorial designs. A genetic algorithm was applied to the optimization of the weld bead geometry. In the optimization problem, the input variables were wire feed rate, welding voltage, and welding speed. The output variables were the bead height bead width, and penetration. The number of levels for each input variable is 16, 16, and 8, respectively. Therefore, according to the conventional full factorial design, in order to find the optimal welding conditions,2048 experiments must be performed. The genetic algorithm, however, found the near optimal welding conditions in less than 40 experiments.

• Journal of Korean Society for Quality Management
• /
• v.48 no.1
• /
• pp.69-86
• /
• 2020

Purpose: This study aims to determine the optimal conditions for the spot welding process that mechanically connects the case of a cylindrical secondary battery and the negative tab. Methods: We use 33 factorial design to derive the optimal conditions for the spot welding process. The pulling strength, the cross-sectional area of nugget, and the shock test life are selected as response variables, which can represent the resistance welding quality. The input variables are selected as the welding time, welding voltage, and pressure, which are the controllable factors in the spot welding process. Results: The main effects of welding time and welding voltage and the interaction effect of welding time and welding voltage are significant. Conclusion: The optimal conditions for the spot welding process to mechanically join the negative electrode tab of the cylindrical secondary battery and the battery case are developed. The result shows that the pulling strength is increased by 44% compared to before improvement under optimal conditions.

• Journal of Electrical Engineering and Technology
• /
• v.4 no.4
• /
• pp.492-498
• /
• 2009

The placement of the UPFC is the major concern to ensure the full potential of utilization in the transmission network. Voltage stability enhancement with the optimal placement of UPFC using stability index such as modal analysis, Voltage Phasor method is made and the loss minimization including UPFC is formulated as an optimization problem. This paper proposes particle swarm optimization for the exact real power loss minimization including UPFC. The implementation of loss minimization for the optimal location of UPFC was tested with IEEE-14 and IEEE-57 bus system.