• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.104-110
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• 2008

In this paper, a novel 2-level-search sphere decoding algorithm for multiple-input multiple-output (MIMO) detection and its VLSI implementation are presented. The proposed algorithm extends the search space by concurrently performing symbol detection on 2 level of the tree search. Therefore, the possibility of discarding good candidates can be avoided. Simulation results demonstrate the good performance of the proposed algorithm in terms of bit-error-rate (BER). From the proposed algorithm, an efficient very large scale integration (VLSI) architecture which incorporates low-complexity and fixed throughput features is proposed. The proposed architecture supports many modulation techniques such as BPSK, QPSK, 16-QAM and 64-QAM. The sorting block, which occupies a large portion of hardware utilization, is shared for different operating modes to reduce the area. The proposed hardware implementation results show the improvement in terms of area and BER performance compared with existing architectures.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.89-95
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• 2008

In this paper, we designed a low power face detection hardware and analysed its power consumption. The face detection hardware was fabricated using Samsung 0.18um CMOS technology and it can detect multiple face locations from a 2-D image. The hardware is composed of 6 functional modules and 11 internal memories. We introduced two operating modes(SLEEP and ACTIVE) to save power and a clock gating technique was used at two different levels: modules and registers. In additional, we divided an internal memory into several pieces to reduce the energy consumed when accessing memories, and fully utilized low power design option provided in Synopsis Design Compiler. As a result, we could obtain 68% power reduction in ACTIVE mode compared to the original design in which none of the above low power techniques were used.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.121-130
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• 2017

NAND flash memory has advantages of non-volatility, little power consumption and fast access time. However, it suffers from inability that does not provide to update-in-place and the erase cycle is limited. Moreover, the unit of read/write operation is a page and the unit of erase operation is a block. Therefore, erase operation is slower than other operations. The AGC, the proposed garbage collection policy focuses on not only garbage collection time reduction for real-time guarantee but also wear-leveling for a flash memory lifetime. In order to achieve above goals, we define three garbage collection operating modes: Fast Mode, Smart Mode, and Wear-leveling Mode. The proposed policy decides the garbage collection mode depending on system CPU usage rate. Fast Mode selects the dirtiest block as victim block to minimize the erase operation time. However, Smart Mode selects the victim block by reflecting the invalid page number and block erase count to minimizing the erase operation time and deviation of block erase count. Wear-leveling Mode operates similar to Smart Mode and it makes groups and relocates the pages which has the similar update time. We implemented the proposed policy and measured the performance compare with the existing policies. Simulation results show that the proposed policy performs better than Cost-benefit policy with the 55% reduction in the operation time. Also, it performs better than Greedy policy with the 87% reduction in the deviation of erase count. Most of all, the proposed policy works adaptively according to the CPU usage rate, and guarantees the real-time performance of the system.

• Aerospace Engineering and Technology
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• v.3 no.2
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• pp.11-19
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• 2004

A software-controlled unregulated bus system in which the main bus is directly connected to a battery and the duty-ratio for PWM switch is controlled by the on-board satellite software, is usually used for LEO satellites. This paper proposes a new power-stage circuit that can be available for modularization of a power regulator which is used at the software-controlled unregulated bus system satellite. And we analyze the proposed power-stage operation according to its operating modes and verify it by performing software simulation and hardware experiment using prototype. We construct a parallel-module converter which is composed of the proposed power-stage and perform experiment to verify modular characteristics of the proposed power-stage. Finally, we verify the usefulness of the proposed power-stage by comparing above results with those of a parallel-module converter made of conventional power-stage.

• Aerospace Engineering and Technology
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• v.3 no.2
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• pp.229-237
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• 2004

In this paper, the design method and algorithms of the signal processor for a multipurpose radar system are analyzed. The signal processor, operating at the two modes-collision avoidance mode and weather mode, has 4 steps of ADC, NCI, STC, CFAR. Several algorithms of NCI and CFAR are analyzed and the optimal design is proposed to the system. CVI and CMLD algorithm have good performance in decreasing the false alarm rate and increasing detection probability, Regarding processor computational capacity, K=12 for CVI, M=16~20, Ko=M-4 for CMLD is suggested. CVI processing needs much time, two or more processors need to be allocated to CVI. So, for the system with four processors, two processors should be allocated to VID of NCI with ADC input and CFAR with STC, and two processors are should be allocated to CVI.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.21 no.8
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• pp.752-760
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• 2011

In tilting pad bearing design process, the selection of the proper configuration type of either a load-between-pad(LBP) or load-on-pad(LOP) as well as preload and pivot offset conditions is to be carefully considered. Also the bearing needs to be designed in order to be suited for the rotor-bearing system and operating condition. In this paper, it is observed that the dynamic characteristics in a five pad tilting pad bearing for the LBP and the LOP configurations are influenced by the variation of preload and pivot offset. In this context, rotor dynamic analysis of the 5 MW industrial gas turbine supported by the tilting pad bearing at the front and roller bearing at the rear is carried out based on the dynamic coefficients of the tilting pad bearing investigated. The result shows that two rigid body critical modes experience various changes according to the influence of the tilting pad bearing uniquely applied to one side of this machine. Mainly, the second critical speed, the rigid body mode of conical shape with high whirling in the tilting pad bearing, is significantly changed by preload and pivot offset regardless of the LBP and LOP configurations. And, the first critical mode, the rigid body mode of conical shape with high whirling in the roller bearing, is sensitively affected by preload applied to the LOP configuration and by its asymmetric dynamic properties.

• Journal of the Korean Society for Railway
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• v.14 no.3
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• pp.271-275
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• 2011

According to governmental policies for green growth, the increase in the traffic volume of railroad is a representative method to reduce total greenhouse gas (GHG) emitted from transport. Comprehensive assessment for the GHG emission of railroad has been studied to compare the difference of transport modes just in the operating step excluded the construction step. The purpose of this study was to evaluate GHG emissions in railroad construction sector. The targets were some construction works for civil, track, building, and electric system in A line. The GHG emission source of constructing railroad infrastructure was mainly the energy consumption of heavy equipments. As a result, the civil construction sector showed more than 96% of total GHG emissions and its specific GHG emission was 2.191 ton $CO_2e/m$. Also, the specific GHG emissions of civil construction works were of the order: earthworks > tunnels > bridges > station. In future, it will be required to calculate the overall GHG emission of railroad through life cycle approaches including operation, maintenance and disposal step.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.10
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• pp.1145-1150
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• 2012

In this paper, an improved Schiffman phase shifter is proposed using slot-coupled lines. It consists of the typical coupled lines and a simple rectangular slot which is placed in the ground plane underneath the coupled lines. Phase responses of the slot-coupled Schiffman phase shifter are analyzed in consideration of the phase velocity of two independent transmission modes and the characteristic impedance of slot-coupled line. The $905^{\circ}$ Schiffman phase shifters with high impedance ratio is realized at 2.4 GHz, which cannot be implemented with the conventional coupled lines. The measured results show that the bandwidth is around 74.2 % within the phase errors ${\pm}5^{\circ}$. The measured return loss is found to be better than 15.0 dB and insertion loss is less than 1.5 dB over the operating frequency band.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.7
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• pp.721-727
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• 2014

In this paper, an broadband Schiffman phase shifter is proposed using vertically installed coupled lines. It consists of the typical coupled lines and a extra coupled lines which is installed vertically on the original coupled lines plane. Phase responses of Schiffman phase shifter with vetically installed coupled lines are analyzed in consideration of the phase velocity of two independent transmission modes and the characteristic impedances. The $90^{\circ}$ Schiffman phase shifters with high impedance ratio is realized at 2.4 GHz, which cannot be implemented with the conventional coupled lines. The measured results show that the bandwidth is 1.5~3.2 GHz(70.8 %) within the phase errors ${\pm}5^{\circ}$. The measured return loss is found to be better than 12.4 dB and insertion loss is less than 1.2 dB over the operating frequency band.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.6B
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• pp.423-432
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• 2012

We design a control circuit that can switch input power between a rechargeable battery and a sensor communication device (mote) depending on the operating state of a solar cell as well as the active and sleep mode of a sensor MAC protocol. A mote that simply combines a solarcell and a rechargeable battery may die if there is not sunlight long. A battery is recharged if sunlight is sufficient and a device is in a sleep mode, and it supplies power if sunlight is low and the mote is in an active mode. A mote can switch its input power between solar cell and battery depending on the output level of a solar cell. During this switching, a mote may lose its state information due to the reset of a microprocessor by the transient power-off. A capacitor is used to cope with this phenomenon and also supplies power to a mote during a sleep mode. Experimental results show that the solar cell based mote operates in a very stable manner against the lack of sunlight long.