• 전기학회논문지
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• 제61권2호
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• pp.347-353
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• 2012

In this paper, authors will develop the quick and precise remote controller of automatic fire detection equipment (P-type one-class receiver) based on information communication technology (IT). The remote controller detects the fire and disaster in the building automatically and quickly and then activates the facilities to extinguish the fire and disaster, monitoring such situation in a real time through wire-wireless communication network. The proposed remote controller is applied a programmable logic device (PLD) micom. of one-chip type which is small size and lightweight and also has highly sensitive-precise reliabilities. The one-chip type PLD micom. analyzes digital signals from sensors, then activates fire extinguishing facilities for alarm and rapid suppression in a case of fire and disaster. The detected data is also transferred to a remote situation room through wire-wireless network of RS232c and bluetooth communication, and then the situation room sends an emergency alarm signal. The automatic fire detection equipment (AFDE) based on IT will minimize the life and wealth loss while prevents fire and disaster.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권3호
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• pp.359-366
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• 2016

Today's multi-core technology rapidly increases with more and more Intellectual Property cores on a single chip. Network-on-Chip (NoC) is an emerging communication network design for SoC. For efficient on-chip communication, routing algorithms plays an important role. This paper proposes a novel multicast routing technique entitled as Docket NoC (Dt-NoC), which eliminates the need of routing tables for faster communication. This technique reduces the latency and computing power of NoC. This work uses a CURVE restriction based algorithm to restrict few CURVES during the communication between source and destination and it prevents the network from deadlock and livelock. Performance evaluation is done by utilizing cycle accurate RTL simulator and by Cadence TSMC 18 nm technology. Experimental results show that the Dt-NoC architecture consumes power approximately 33.75% 27.65% and 24.85% less than Baseline XY, EnA, OEnA architectures respectively. Dt-NoC performs good as compared to other routing algorithms such as baseline XY, EnA, OEnA distributed architecture in terms of latency, power and throughput.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.747-748
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• 2006

In this paper, we describe photonic sensor interface and driver program based on SOPC(System on a programmable chip) platform. This platform uses device that has ARM922T processor and APEX FPGA area on a chip. As for driver program development, three different methods are tried such as simple firmware, real-time OS based program and embedded Linux based program, and results are compared for SoC implementation.

• 한국전자파학회논문지
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• 제24권6호
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• pp.633-643
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• 2013

IC 내부의 전원분배망(PDN: Power Delivery Network) 회로를 분석하기 위해서는 IC의 디자인 정보가 담긴 파일이 필요하지만, 상용 IC(Commercial IC)의 경우 보안상의 이유로 디자인 정보를 제공하지 않고 있다. 하지만 온-칩 전원분배망(On-chip PDN) 특성이 포함된 경우에는 PCB와 패키지의 특성만으로는 정확한 해석이 어려우므로 본 연구에서는 IC 내부의 정보가 제공하지 않는 전원분배망(PDN) 회로의 추출에 관하여 연구를 하였다. IC 내부의 전원분배망(PDN)의 주파수에 대한 특성을 추출하기 위하여, IEC62014-3에서 제안하고 있는 추출용 보드를 제작하였고, 추출용 보드를 구성하고 있는 SMA 커넥터, 패드, 전송 선로, 그리고 QFN 패키지의 주파수에 대한 특성들을 분석하였다. 추출된 결과들은 디임베딩(de-embedding) 기술에 적용하여 IC 내부의 전원분배망(PDN) 회로를 S-parameter 기반으로 모델을 추출하였고, 평가용 보드의 전원분배망 결합회로(PDN Co-simulation)모델에 적용하여 측정과 비교한 결과, ~4 GHz까지 잘 일치하였다.

• 전자공학회논문지
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• 제53권4호
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• pp.68-75
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• 2016

다중 프로세서 시스템-온-칩(Multi-Processor SoC, MPSoC)에서의 코어 및 IP 개수 증가 추세에 따라 병렬처리와 확장성에 유리한 인터커넥션 구조인 네트워크-온-칩(Network-on-Chip, NoC)이 등장하였다. 하지만 기존 IP를 재활용하기 위해서는 버스 프로토콜과 호환가능한 NoC에서의 지연시간을 최적화하기 위한 연구가 필요하다. 본 논문에서는 버스 프로토콜 호환 가능한 NoC 설계 시, 버스 프로토콜에서 특성이 다른 다수의 트랜잭션 단계에서 유발되는 홉 수와 경로 충돌의 대립관계로 인해 지연시간이 증가하는 문제를 주소 및 데이터 네트워크로 분리 설계함으로써 해결하였다. 모의실험으로 벤치마크 어플리케이션과 무작위 생성한 어플리케이션에서의 실험 결과를 통해 Mesh구조와 TopGen의 비정형 토폴로지와 비교했을 때, 평균 지연시간은 19.46% 및 실행시간은 10.55% 감소하였다.

• 반도체디스플레이기술학회지
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• 제14권3호
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• pp.13-22
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• 2015

LED (Light Emitting Diode) lighting is gaining more and more market penetration as one of the global warming countermeasures. LED is the next generation of fusion source composed of epi/chip/packaging of semiconductor process technology and optical/information/communication technology. LED has been applied to the existing industry areas, for example, automobiles, TVs, smartphones, laptops, refrigerators and street lamps. Therefore, LED makers have been striving to achieve the leading position in the global competition through development of core source technologies even before the promotion and adoption of LED technology as the next generation growth engine with eco-friendly characteristics. However, there has been a point of view on the cost compared to conventional lighting as a large obstacle to market penetration of LED. Therefore, companies are developing a Chip-Scale Packaging (CSP) LED technology to improve performance and reduce manufacturing costs. In this study, we perform patent analysis associated with Flip-Chip CSP LED and flow chart for promising technology forecasting. Based on our analysis, we select key patents and key patent players to derive the business strategy for the business success of Flip-Chip CSP PKG LED products.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.971-974
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• 2005

In this paper, we describe photonic sensor interface in SOPC(System on a programmable chip) platform. This platform uses device that has ARM922T processor and APEX FPGA area on a chip. We use two development kits. The one is embedded kit that using Intel's Xscale device, the another is SOPC kit that using Altera's Excalibur device. We implement some device logic that DMAC, ADCC, etc. and application.

• 전기학회논문지P
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• 제53권3호
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• pp.129-133
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• 2004

As In DS/CDMA(direct sequence code division multiple access) system, the system capacity is limited by multiple access interference(MAI), and self-interference(SI) resulting from the multi-path propagation of the desired user signal. This paper, which the approximated analytic chip waveforms are nearly the same as the computer generated chip waveforms are shown. And then, the BER(Bit Error Rate) performances in CDMA system using the approximated analytic chip waveforms are shown.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 D
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• pp.2559-2561
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• 2004

This paper proposes the new signal-to-noise ratio(SNR) that is different from the conventional signal-to-noise ratio (SNR) in direct-sequence code-division multiple-access communication system employing offset quadrature phase-shift keying(OQPSK) and using a chip waveform. The conventional SNR value is so different from a real SNR value. Therefore, we propose a new SNR equation approximated to real SNR. The multiple-access interference(MAI) in DS-CDMA communication system has an effect on SNR performance and MAI is concerned with the correlation functions of the chip waveform. For this reason, we considered all possible correlations of chip waveforms. In conclusion, the SNR value of proposed method is enclosed to the real SNR value.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(5)
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• pp.171-174
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• 2000

In stead of RF module which has been used conventionally in many remote measurement applications, a new type of remote measurement system based on PCS(Personal communication system) and one chip Microcontroller is proposed in this work. PCS has many advantages with respect to cost reliability, communication quality, and so on. The proposed system consists of three different modules: PCS module, micro-controller module, and sensor module. System configuration as well as illustrative experiments will be described in detail.