• Journal of the Microelectronics and Packaging Society
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• v.25 no.1
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• pp.1-10
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• 2018

Recently, there has been rapid development in the field of flexible electronic devices, such as organic light emitting diodes (OLEDs), organic solar cells and flexible sensors. Encapsulation process is added to protect the flexible electronic devices from exposure to oxygen and moisture in the air. Using numerical simulation, we investigated the effects of the encapsulation layer on mechanical stability of the silicon chip, especially the fracture performance of center crack in multi-layer package for various loading condition. The multi-layer package is categorized in two type - a wide chip model in which the chip has a large width and encapsulation layer covers only the chip, and a narrow chip model in which the chip covers both the substrate and the chip with smaller width than the substrate. In the wide chip model where the external load acts directly on the chip, the encapsulation layer with high stiffness enhanced the crack resistance of the film chip as the thickness of the encapsulation layer increased regardless of loading conditions. In contrast, the encapsulation layer with high stiffness reduced the crack resistance of the film chip in the narrow chip model for the case of external tensile strain loading. This is because the external load is transferred to the chip through the encapsulation layer and the small load acts on the chip for the weak encapsulation layer in the narrow chip model. When the bending moment acts on the narrow model, thin encapsulation layer and thick encapsulation layer show the opposite results since the neutral axis is moving toward the chip with a crack and load acting on chip decreases consequently as the thickness of encapsulation layer increases. The present study is expected to provide practical design guidance to enhance the durability and fracture performance of the silicon chip in the multilayer package with encapsulation layer.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.61-71
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• 1999

The recent trend toward higher frequencies, miniaturization and lower-cost in wireless communication equipment is demanding high density packaging technologies such flip chip interconnection and multichip module(MCM) as a substitute of conventional plastic package. With analyzing the recently reported research results of the RF flip chip, this paper presents the technical issues and advantages of RF flip chip and suggest the flip chip technologies suitable for the development stage. At first, most of RF flip chips are designed in a coplanar waveguide line instead of microstrip in order to achieve better electrical performance and to avoid the interaction with a substrate. Secondly, eliminating wafer back-side grinding, via formation, and back-side metallization enables the manufacturing cost to be reduced. Finally, the electrical performance of flip chip bonding is much better than that of plastic package and the flip chip interconnection is more suitable for Transmit/Receiver modules at higher frequency. However, the characterization of CPW designed RF flip chip must be thoroughly studied and the Au stud bump bonding shall be suggested at the earlier stage of RF flip chip development.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.3 no.2
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• pp.25-31
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• 2004

Machinability in metal cutting processes depends on cutting input conditions such as cutting velocity, feed rate, depth of cut, types of work material and tool shape factors. In this study, to assess chip breaking characteristics of a turning process, an equivalent oblique cutting system to this has been established. And the equivalent effective rake angle was determined using side rake angle, back rake angle and side cutting edge angle of the tool. A non-dimensional parameter, Chip breaking index(CB), was used to assess Chip breaking characteristics of chip in conjunction with the equivalent effective rake angle. In case of positive rake angles of the equivalent effective rake, the back rake angle has little effect on the chip breaking characteristics however, in case of negative ones, the side rake angle has some effect on Chip breaking characteristics.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.7
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• pp.328-334
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• 2002

The DNA chips are devices associating the specific recognition properties of two DNA single strands through hybridization process with the performances of the microtechnology. In the literature, the "Gene chip" or "DNA chip" terminology is employed in a wide way and includes macroarrays and microarrays. Standard definitions are not yet clearly exposed. Generally, the difference between macro and microarray concerns the number of active areas and their size, Macroarrays correspond to devices containing some tens spots of 500$\mu$m or larger in diameter. microarrays concern devices containing thousnads spots of size less than 500$\mu$m. The key technical parameters for evaluating microarray-manufacturing technologies include microarray density and design, biochemical composition and versatility, repreducibility, throughput, quality, cost and ease of prototyping. Here we report, a new method in which minute particles are arranged in a random fashion on a chip pattern using random fluidic self-assembly (RFSA) method by hydrophobic interaction. We intend to improve the stability of the particles at the time of arrangement by establishing a wall on the chip pattern, besides distinction of an individual particle is enabled by giving a tag structure. This study demonstrates the fabrication of a chip pattern, immobilization of DNA to the particles and arrangement of the minute particle groups on the chip pattern by hydrophobic interaction.ophobic interaction.

• Journal of the Korean Society for Precision Engineering
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• v.12 no.8
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• pp.53-62
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• 1995

In recent years, the rapid development of the machine tool and tough insert has made metal removal rates increase, and automatic system without human supervision requires a higher degree reliability of machining process. Therefore the control of chips is one of the important topics which deserves much attention. The chip classification was made based upon standard deviation of the mean cutting force measured by a tool dynamometer. STS304was chosen as the workpiece which is known as the difficult-to-cut material and mainly saw-toothed chip produced, and the chip type according to the standard deviation of mean cutting force was classified into five categories in this experiment. Long continuous type chip which interrupts the normal cutting process, and damages the operator, tool and workpiece has low standard deviation value, while short broken type chip, which is favourable chip for disposal, has relatively large standard deviation value. In addition, we investigated the possibility that the chip type can be predicted analyzing the relationship between chip type and cutting condition by the trained neural network, and obtained favourable results by which the chip type can be predicted with cutting conditon before cutting process.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.57-57
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• 2000

The purpose of this paper is show that an chip mounter can be modeled by stochastic petri nets, and that the simulator to verify a fitness of the program to assemble. The chip mounter can be constructed by using the petri net class (CPetriNet) based on the object-oriented programming. By using this simulator, we can get the information about the description of motion of the chip mounter, and moreover, we can evaluate the productivity.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.4
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• pp.53-58
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• 2013

An innovative packaging solution, Flip Chip with Copper (Cu) Column bond on lead (BOL) Enhanced Process (fcCuBE$^{(R)}$) delivers a cost effective, high performance packaging solution over typical bond on capture pad (BOC) technology. These advantages include improved routing efficiency on the substrate top layer thus allowing conversion functionality; furthermore, package cost is lowered by means of reduced substrate layer count and removal of solder on pad (SOP). On the other hand, as electronic packaging technology develops to meet the miniaturization trend from consumer demand, reliability testing will become an important issue in advanced technology area. In particular, electromigration (EM) of flip chip bumps is an increasing reliability concern in the manufacturing of integrated circuit (IC) components and electronic systems. This paper presents the results on EM characteristics on BOL and BOC structures under electrical current stressing in order to investigate the comparison between two different typed structures. EM data was collected for over 7000 hours under accelerated conditions (temperatures: $125^{\circ}C$, $135^{\circ}C$, and $150^{\circ}C$ and stress current: 300 mA, 400 mA, and 500 mA). All samples have been tested without any failures, however, we attempted to find morphologies induced by EM effects through cross-sectional analysis and investigated the interfacial reaction characteristics between BOL and BOC structures under current stressing. EM damage was observed at the solder joint of BOC structure but the BOL structure did not show any damage from the effects of EM. The EM data indicates that the fcCuBE$^{(R)}$ BOL Cu column bump provides a significantly better EM reliability.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.21 no.8
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• pp.973-982
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• 1997

Effect of vortex generator on the heat transfer enhancement of electronic chips is investigated using naphthalene sublimation technique. Experiments are performed for a single chip and chip arrays, and shape of vortex generator, position of vortex generator, stream wise chip spacing and air velocity are varied. Local and average heat transfer coefficients are measured on the top surface of simulated electronic chips, and compared with those obtained without vortex generator. In case of a single chip, heat transfer augmentation is seen only on the upstream portion of chip surface, while heat transfer enhancement is found on the whole surface for chip arrays. Rectangular wing type vortex generator is found to be more effective than delta wing.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.481-485
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• 1987

The fabrication of a micro mass flow sensor on a silicon chip by means of micro-machining technology is described on this paper. The operation of micro mass flow sensor is based on the heat transfer from a heated chip to a fluid. The temperature differences on the chip is a measure for the flow velocity in a plane parallel with the chip surface. An anisotropic etching technigue was used for the formation of the V-type groove in this fabrication. The micro mass flow sensor is made up of two main parts ; A thin glass plate embodying the connecting parts and mass flow sensor parts in silicon chip. This sensor have a very small size and a neglible dead space. Micro mass flow sensor can fabricate on silicon chip by micro machining technology too.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.1133-1136
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• 2004

The structures of airplane consist of sheet metal part, heavy machined part, and so on, which generate enormous amounts of cutting chip when these parts are machined. The cutting chip detoriorates the part quality and production efficiency. Therefore, cutting chip collecting apparatus is necessary for better quality and efficiency. In this study, blowing type cutting chip collecting apparatus was newly proposed and the concept design of the apparatus was examined through numerical analysis. Computations using the mass-averaged implicit 2D Navier-Stokes equations are applied to predict the nozzle flow field. The standard k-e turbulent model are employed to close the governing equations. Consequently, this study shows that the suggested blowing type cutting chip collecting apparatus can be alternative to existing expensive chip collecting apparatus.