• Journal of Power Electronics
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• v.18 no.3
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• pp.892-901
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• 2018

SiC MOSFETs have been used to improve system efficiency in high frequency converters due to their extremely high switching speed. However, this can result in undesirable parasitic oscillations in practical systems. In this paper, models of the key components are introduced first. Then, theoretical formulas are derived to calculate the switching oscillation frequencies after full turn-on and turn-off in clamped inductive circuits. Analysis indicates that the turn-on oscillation frequency depends on the power loop parasitic inductance and parasitic capacitances of the freewheeling diode and load inductor. On the other hand, the turn-off oscillation frequency is found to be determined by the output parasitic capacitance of the SiC MOSFET and power loop parasitic inductance. Moreover, the shifting regularity of the turn-off maximum peak voltage with a varying switching speed is investigated on the basis of time domain simulation. The distortion of the turn-on current is theoretically analyzed. Finally, experimental results verifying the above calculations and analyses are presented.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.305-308
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• 1997

The on-line calculation method is developed to obtain the temperature trajectory that brings the reactants to the desired state in batch styrene polymerization reactor. The temperature trajectory is obtained by applying the moments of the polymer concentration to the 2-step calculation method. The computer simulation is also carried out to verify the superiority of the on-line method to the off-line one. When a temperature disturbance of constant size is introduced, the off-line results shows considerable deviation from the target degree of polymerization. The on-line strategy set up a new trajectory to reach the desired state by using the current state of the reactor. Therefore, the on-line strategy deals with the changes of the system more adequately than the off-line strategy.

• Proceedings of the Korean Society For Composite Materials Conference
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• 2000.04a
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• pp.76-79
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• 2000

Polymeric composites exhibit highly nonlinear and rate dependent behavior during loading and unloading in off-axis directions. The equilibrium state of stress during loading is lower than the state of stress produced at finite strain rates. The amount of stress relaxation during loading decreases. Interestingly, however, the stress goes up to reach to the equilibrium state of stress for a fixed displacement during unloading. The unloading behavior is quite similar to the loading behavior. The stress relaxation patterns during loading and unloading is also similar, and those depend on the fiber orientation angles and the loading and unloading rates. The AS4/PEEK thermoplastic composite is used to characterize the relaxation behavior for different off-axis angles and loading rates. There exists a transient loading region at the beginning of unloading. The effective stress and effective plastic strain concept is used to establish a master curve of stress recovery pattern for different off-axis angles and unloading rates.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.3
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• pp.272-278
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• 2008

This paper investigated the a-si:H gate driver with the stepwise gate signal. In 1-chip type mobile LCD application the stepwise gate signal for low power consumption can be used by adding simple switching circuit. The power consumption of the a-Si:H gate driver can be decreased by employing the stepwise gate signal in the conventional circuit. In conventional one, the effect of stepwise gate signal can decrease slew rate and increase the fluctuation of gate-off state voltage, In order to increase the slew rate and decrease the gate off state fluctuation, we proposed a new a-Si:H TFT gate driver circuit. The simulation data of the new circuit show that the slew rate and the gate-off state fluctuation are improved, so the circuit can work reliably.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.113-116
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• 1996

The drain current of the MOSFET in the off state(i.e., Id when Vgs=0V) is undesired but nevertheless important leakage current device parameter in many digital CMOS IC applications (including DRAMs, SRAMs, dynamic logic circuits, and portable systems). The standby power consumed by devices in the off state have added to the total power consumed by the IC, increasing heat dissipation problems in the chip. In this paper, hot-carrier-induced degra- dation and gate-induced-drain-leakage curr- ent under worse case in P-MOSFET\`s have been studied. First of all, the degradation of gate-induced- drain-leakage current due to electron/hole trapping and surface electric field in off state MOSFET\`s which has appeared as an additional constraint in scaling down p-MOSFET\`s. The GIDL current in p-MOSFET\`s was decreased by hot-electron stressing, because the trapped charge were decreased surface-electric-field. But the GIDL current in n-MOS77T\`s under worse case was increased.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.822-824
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• 2007

This paper investigated a gate driver circuit with amorphous silicon for mobile TFT-LCD. In the conventional circuit, the fluctuation of the off-state voltage causes the fluctuation of gate line voltages in the panel and then image quality becomes worse. Newly designed gate driver circuit with dynamic switching inverter and carry out signal reduce the fluctuation of the off-state voltage because dynamic switching inverter is holding the off-state voltage and the delay of carry signal is reduced. The simulation results show that the proposed a-Si:H gate driver has low noise and high stability compared with the conventional one.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.07a
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• pp.201-202
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• 2005

The electrical characteristics of high-voltage LDMOSFET (Lateral Double-diffused MOSFET) fabricated by a CMOS technology were investigated depending on the process and design parameters. The off-state breakdown voltages of n-channel LDMOSFETs were linearly increased with increasing to the drift region length. For the case of decreasing n-well ion implant doses from $1.0\times10^{13}/cm^2$ to $1.0\times10^{12}/cm^2$, the off-state breakdown voltage was increased approximately two times, however, the on-resistance was also increased about 76%. Moreover, the on- and off-state breakdown voltages were also linearly increased with increasing the channel to n-tub spacing due to the reduction of impact ionization at the drift region.

• International journal of steel structures
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• v.18 no.4
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• pp.1373-1383
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• 2018

Experimental study was conducted to investigate the seismic behavior of roof joint. Eight full-scale specimens were tested considering the effects of axial force, joint height, hole shape of base plate and edge distance of concrete on the failure mode and resistance capacity of roof joint. With the increase of axial force, the hysteretic curves were fuller. The mechanical model of roof joint change from bending to shear. With the increase of joint height, the ultimate strength of roof joint decreased. If the hole shape of base plate changed from circle to loose, the slip behavior of roof joint appeared and the ultimate strength of roof joint decreased. The damage of edge concrete may occur if the edge distance of concrete was not big enough.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.403-404
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• 2012

We fabricated TFT devices with the GeSe channel. A single device consists of a Pt source and drain, a Ti glue layer and a GeSe chalcogenide channel layer on SiO2/Si substrate which worked as the gate. We confirmed the drain current with variations of gate bias and channel size. The I-V curves of the switching device are shown in Fig. 1. The channel of the device always contains amorphous state, but can be programmed into two states with different threshold voltages (Vth). In each state, the device shows a normal Ovonic switching behavior. Below Vth (OFF state), the current is low, but once the biasing voltage is greater than Vth (ON state), the current increases dramatically and the ON-OFF ratio is high. Based on the experiments, we draw the conclusion that the gate voltage can enhance the drain current, and the electric field by the drain voltage affects the amorphous-amorphous transition. The switching device always contains the amorphous state and never exhibits the Ohmic behavior of the crystalline state.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.280-281
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• 2011

We fabricated the devices of TFT type with the amorphous chalcogenide channel. A single device consists of a Pt source and drain, a Ti glue layer and a GeSe chalcogenide channel layer on SiO2/Si substrate which worked as the gate. We confirmed the drain current with variations of gate bias and channel size. The I-V curves of the switching device are shown in Fig. 1. The channel of the device always contains amorphous state, but can be programmed into two states with different threshold voltages (Vth). In each state, the device shows a normal Ovonic switching behavior. Below Vth (OFF state), the current is low, but once the biasing voltage is greater than Vth (ON state), the current increases dramatically and the ON-OFF ratio is about 4 order. Based on the experiments, we contained the conclusion that the gate voltage can enhance the drain current, and the electric field by the drain voltage affects the amorphous-amorphous transition. The switching device always contains the amorphous state and never exhibits the Ohmic behavior of the crystalline state.