• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.20 no.1
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• pp.89-93
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• 2020

In this paper, Ku-band Receiver for compact doppler radar has been designed and fabricated. It composed of MWR(Microwave Receiver) and IFR(Intermediate Frequency Receiver) which have 5 receive path. We applied limiter circuit to protect MWR from Tx leakage power and maximum 2 W. IFR can change the Rx path to broad band or narrow band by MSC(Mode Selection Switch). It is observed that fabricated receiver performs 68 dB gain and 3.7 dB noise figure, 93 ns limiter recovery time. Proposed Ku-band receiver is expected to apply for Ku-band compact doppler radar.

• Smart Media Journal
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• v.4 no.2
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• pp.55-61
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• 2015

A bandwidth-enhanced ultra-wide band (UWB) CMOS balun-LNA is implemented as a part of a software defined radio (SDR) receiver which supports multi-band and multi-standard. The proposed balun-LNA is composed of a single-to-differential converter, a differential-to-single voltage summer with inductive shunt peaking, a negative feedback network, and a differential output buffer with composite common-drain (CD) and common-source (CS) amplifiers. By feeding the single-ended output of the voltage summer to the input of the LNA through a feedback network, a wideband balun-LNA exploiting negative feedback is implemented. By adopting a source follower-based inductive shunt peaking, the proposed balun-LNA achieves a wider gain bandwidth. Two LNA design examples are presented to demonstrate the usefulness of the proposed approach. The LNA I adopts the CS amplifier with a common gate common source (CGCS) balun load as the S-to-D converter for high gain and low noise figure (NF) and the LNA II uses the differential amplifier with the ac-grounded second input terminal as the S-to-D converter for high second-order input-referred intercept point (IIP2). The 3 dB gain bandwidth of the proposed balun-LNA (LNA I) is above 5 GHz and the NF is below 4 dB from 100 MHz to 5 GHz. An average power gain of 18 dB and an IIP3 of -8 ~ -2 dBm are obtained. In simulation, IIP2 of the LNA II is at least 5 dB higher than that of the LNA I with same power consumption.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.11
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• pp.66-70
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• 2016

This paper presents an 24 GHz I/Q LO generator for a heartbeat measurement radar system. In order to improve the mismatch performance between I and Q LO signals against process variation, a 24 GHz I/Q LO generator employing a low-pass phase shifter and a high-pass phase shifter composed of inductors and capacitors is proposed. The proposed 24 GHz I/Q LO generator consists of an LO buffer, a low-pass phase shifter and a high-pass phase shifter. It was designed using a 65 nm CMOS technology and draws 8 mA from a 1 V supply voltage. The proposed 24 GHz I/Q LO generator shows a gain of 7.5 dB, a noise figure of 2.3 dB, 0.1 dB gain mismatch and $4.3^{\circ}$ phase mismatch between I and Q-path against process and temperature variations for the operating frequencies from 24.05 GHz to 24.25 GHz.

• Journal of the Korean Institute of Telematics and Electronics T
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• v.35T no.2
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• pp.86-92
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• 1998

In this paper, it is derived the system design parameters for the J-STD-018 of the PCS mobile station(MS) minimum performance using DS/CDMA analyzed the system performance due to the receiver components. The simulation shows the selectivity is -70.96dB at 1.25MHz frequency offset from the carrier frequency while the MS noise figure to satisfy J-STD-018 is 10dB and the input 3rd harmonics intercept point of the MS class I and MS class II-V is -9.5dBm and -14dBm respectively. When the interference power level at the receiver is small, the receiver has better performance as we increase the gain of LNA. However, when the interference level at the receiver is large, the receiver performance is decreased by the effect of the spurious. Thus, the effectiveness of LNA On/Off switching technique is proved as to reduce the effect of the spurious.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.3
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• pp.41-47
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• 1999

Ion implanted GaAs MESFET with low resistive layer was fabricated using Si diffusion into GaAs from SiN. During the thermal annealing at 95$0^{\circ}C$ for 30s, Si diffused into ion implanted region of GaAs from SiN and they formed low resistive layer of 350$\AA$ thickness. The diffusion of Si decreased the sheet resistance of source and drain region from 1000$\Omega$/sq. to 400$\Omega$/sq. and the AuGe/Ni/Au ohmic contact resitivity from 2.5$\times$10sub -6$\Omega$-cmsup 2 to $1.5\times$10sup -6$\Omega$-cmsup 2. The fabricated lum gate length MESFET with Si diffused surface layer shows the transconductance of 360ms/mm, 8.5dB of associated gain and 3.57dB of minimum noise figure at 12GHz. These performances are better than that of MESFET without Si diffused layer.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.7
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• pp.1186-1193
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• 2000

In this paper, the system performance with the selection diversity, which is applied to the FH/MFSK system in Nakagami fading channel, is analyzed. The deletion probability is derived from the received signal to noise ratio(SNR) after selection combining and the parameters such as the number of users(M), SNR, Nakagami fading figure(m), and the number of diversity branches(D) is used for the performance analysis of the FH/MFSK system. Assuming that m set 1, it is observed that the bit error rate(BER) is 1.0$\times$$10^{-3}$ and 1.0$\times$$10^{-4}$ at D =1(no diversity) and D=2, respectively, and then is decreased by 10 times. Assuming that m set 2, it is also shown that the BER has a constant value although D is increased. In the case of D=2, the system capacity is more 75% and 20% than that considering no diversity at SNR=15 dB and 25 dB, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.5
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• pp.472-478
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• 2003

In this paper, a near zero If mixer was designed in cascode structure by using two single-gate FETs. Since it is driven by the second order harmonic of LO signal, a sub-harmonic cascode FET mixer has good LO-RF port isolation characteristic. In order to solve DC offset of a homodyne system, near zero If is used instead of zero If and the mixer is driven by sub-harmonic of LO signal. As RF input power was -30 dBm and LO power was 6 dBm, the designed mixer had 6.7 dB conversion gain, 8.4 dB noise figure, 31.5 dB LO-RF port isolation, -1.9 dBm lIP3 and -2.8 dBm IIP2.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.6 no.4
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• pp.72-79
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• 1997

A study is a experiment which is figure out to optimum discharge cutting condition of the surface roughness, electronic discharging speed and electrode wear ration with Ton , Toff and V(voltage) as an input condition according to the current(Ip) in an electric spark machine : 1) Electrode is utilized Cu and Graphite. 2) Work piece is used the material of carbon steel. The condition of experiment is : 1) Current is varied 0.7(A) to 50(A) and the time of electric discharging to work piece in each time is 30(min) to 60(min). 2) After the upper side of work piece was measured in radius(5$\mu$m) of stylus analyzed the surface roughness to ade the table and graph of Rmax by yielding data. 3) Electro wear ratio is : \circled1Cooper was measured ex-machining and post-machining by the electronic balance. \circled2The ex-machining of graphite measured by it, the post-machining was found the data from volume $\times$specific gravity and analyzed to made its table and graph on ground the data. 4) In order to keep the accuracy of voltage affected to the work piece was equipped with the A.V. R and the memory scope was sticked to the electric spark machine. 5) In order to preserve the precision of current, to get rid of the noise occured by internal resistance of electric spark machine and to force injecting for the discharge fluid , it made the fixed table for a work piece to minimize the work error by means of one's failure during the electric discharging.

• Journal of Korea Multimedia Society
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• v.10 no.1
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• pp.49-57
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• 2007

Recently, CMOS RF integration has been widely explored in the wireless communication area to save cost, power, and chip area. The direct conversion architecture, rather than a more conventional super-het-erodyne, has been an attractive choice for single-chip integration because of its many advantages. However, the direct conversion architecture has several fundamental problems to solve in achieving performance comparable to a super-heterodyne counterpart. In this paper, we describe a programmable filter for mobile communication terminals using a direct conversion architecture. The proposed filter can be implemented with the active-RC filter and programmed to meet the requirements of different communication standards, including GSM, DECT and WCDMA. The filter can be tuned to select a detail frequency by changing the gate voltage of the MOS resistors. The gain of the proposed architecture can be programmed from 27dB to 72dB using the filter gain and VGA in 3dB steps.

• Journal of Advanced Navigation Technology
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• v.11 no.1
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• pp.17-23
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• 2007

This paper, describes the VDR physical layer design in VDL Mode-2 in order to meet the requirements of International standards. VDR's frequency band is 117.975~137MHz, and CSMA(Carrier Sense Multiple Access), D8PSK(Differential Eight Phase Shift Keyed), 25KHz's channel bandwidth use. The analysis of the isolated channel from near channels, sensitivity of the receiver, dynamic range of the receiver, linear of the transmitter and energy of spurious for linear and non-linear simulation as a requirement condition of performance of VDR and teaches the course of design. The transmitting power level should be lower than 5dB from Po1dB point and the selected IF frequency is 45MHz to suppress the spurious signals. The receiver designed has 4.5dB of Noise figure, 27.52dB of Es/No, Mixer isolation up to 30dB, IIP3 power of LNA up to +10dBm to minimize the intermodulation.