• Journal of Power Electronics
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• 제15권2호
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• pp.504-517
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• 2015

This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

• 전력전자학회논문지
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• 제22권2호
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• pp.150-158
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• 2017

This study proposes a new pulse-width modulation switching pattern for the low conduction loss of a three-level neutral point clamped (NPC)-based dual-active bridge (DAB) converter. The operational principle for a bidirectional power conversion is a phase-shift modulation. The conventional switching method of the three-level NPC-based DAB converter shows a symmetric switching pattern. This method has a disadvantage of high root-mean-square (RMS) value of the coupling inductor current, which leads to high conduction loss. The proposed switching method shows an asymmetrical pattern, which can reduce the RMS value of the inductor current with lower conduction loss than that of the conventional method. The performance of the proposed asymmetrical switching method is theoretically analyzed and practically verified using simulation and experiment.

• Journal of Power Electronics
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• 제19권4호
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• pp.989-999
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• 2019

This paper proposes a fault-tolerant control strategy with finite control set model predictive control (FCS-MPC) based on hierarchical optimization for five-level H-bridge neutral-point-clamped (5L-HNPC) inverter-fed induction motor drives. Fault-tolerant operation is analyzed, and the fault-tolerant control algorithm is improved. Adopting FCS-MPC based on hierarchical optimization, where the voltage is used as the controlled objective, called model predictive voltage control (MPVC), the postfault controller is simplified as a two layer control. The first layer is the voltage jump limit, and the second layer is the voltage following control, which adopts the optimal control strategy to ensure the current following performance and uniqueness of the optimal solution. Finally, simulation and experimental results verify that 5L-HNPC inverter-fed induction motor drives have strong fault tolerant capability and that the FCS-MPVC based on hierarchical optimization is feasible.

• Journal of Power Electronics
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• 제19권3호
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• pp.727-743
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• 2019

This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.

• 전기전자학회논문지
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• 제24권3호
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• pp.867-876
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• 2020

본 논문에서는 3레벨 인버터로 구동되는 IPMSM의 고주파 주입 센서리스 운전에서 중성점 전압 리플 저감을 제안한다. 고주파 전압 주입 기반의 센서리스 제어는 IPMSM의 저속 영역에서 일반적으로 사용하는 센서리스 제어 기법이다. 고주파 전압 주입을 이용한 IPMSM의 센서리스 제어 과정에서 중성점에서의 전압 리플이 증가하는 문제가 발생한다. 중성점에서의 큰 전압 리플은 출력 전류를 왜곡시킬 뿐만 아니라 직류단 커패시터의 수명을 단축시키므로 저감되어야 한다. 본 논문에서 제안하는 기법은 지령 전압에 적절한 값을 보상하여 중성점 전압 리플을 저감하며, 보상값은 지령 전압과 전류를 이용하여 간단히 계산한다. 제안하는 중성점 전압 리플 저감 기법의 타당성은 시뮬레이션을 통해 검증한다.

• 전기전자학회논문지
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• 제24권1호
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• pp.170-177
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• 2020

본 논문은 HF/LF 변조 방법을 적용한 ANPC (active neutral point clamped) 인버터의 스위치 개방 고장에 대응하기 위한 허용 제어 방법을 제안한다. 기존 Si 기반 인버터에 비해 SiC MOSFET과 Si IGBT로 구성된 ANPC 인버터는 시스템의 효율이 높고 출력 품질이 우수하다. HF/LF 변조는 커뮤테이션 루프를 줄일 수 있어 MW 급 대용량 인버터를 위해 사용되는 변조 기법이다. MW 급 인버터의 스위치 개방 고장은 부하에 심각한 손상을 입히며, 인버터가 동작을 멈출 경우 막대한 경제적 손실을 야기한다. 제안하는 스위치 개방 고장의 허용 제어 기술은 ANPC 인버터의 지속적인 운전을 가능하게 하며 신뢰성을 향상 시킨다. 제안하는 기법의 성능은 시뮬레이션 결과를 통해 검증한다.

• Journal of Power Electronics
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• 제19권3호
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• pp.702-713
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• 2019

Multilevel Inverters (MLIs) are widely used in medium voltage applications due to their various advantages. In addition, there are numerous types of MLIs for such applications. However, the diode-less 3-level (3L) T-type Neutral Point Clamped (NPC) MLI is the most advantageous due to its low conduction losses and high potential efficiency. The power circuit of a 3L T-type NPC is derived by the conventional two level inverter by a slight modification. In order to explore the MLI performance for various Pulse Width Modulation (PWM) schemes, this paper examines the operation of a 3L (five level line to line) T-type NPC MLI for various types of Multi-Carriers Pulse Width Modulation (MCPWM) schemes. These PWM schemes are compared in terms of their voltage profile, total harmonic distortion (THD) and conduction losses. In addition, a 3L T-type NPC MLI is also compared with the conventional NPC in terms of number of switches, clamping diodes, main diodes and capacitors. Moreover, the capacitor-balancing problem is also investigated using the Neutral Point Fluctuation (NPF) method with all of the MCPWM schemes. A 1kW 3L T-type NPC MLI is simulated in MATLAB/Simulink and implemented experimentally and its performance is tested with a 1HP induction motor. The results indicate that the 3L T-type NPC MLI has better performance than conventional NPC MLIs.

• 한국산업융합학회 논문집
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• 제26권5호
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• pp.953-965
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• 2023

The stratospheric drones are developed to perform missions such as weather observation, communication relay, surveillance, and reconnaissance at 18km to 20km, where climate change is minimal and there is no worry about a collision with aircraft. It uses solar panels for daytime flights and energy stored in batteries for night flights, providing many advantages over existing satellites. The electrical and power systems essential for stratospheric drone flight must ensure reliability, efficiency, and lightness by selecting the optimal circuit topology. Therefore, it is necessary to analyze the circuit topology of various types of multi-level inverters with high redundancy that can ensure the reliability and efficiency of the motor driving power required for stable long-term flight of stratospheric drones. By quantifying the switch element voltage drop and the number and weight of inverter components for each topology, we evaluate efficiency and lightness and propose the most suitable circuit topology for stratospheric drones.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• Journal of Power Electronics
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• 제17권2호
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• pp.368-379
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• 2017

In this paper, a direct torque control algorithm with novel duty cycle-based modulation is proposed for permanent magnet synchronous motor drives fed by neutral-point clamped three-level inverters. Compared with the standard DTC, the proposed algorithm can suppress steady-state torque ripples as well as ensure neutral-point potential balance and smooth vector switching. A unified torque/flux evaluation table with multiple voltage vectors and precise control levels is established and used in this method. This table can be used to evaluate the effects of duty-cycle vectors on torque and flux directly, and the elements of the table are independent of the motor parameters. Consequently, a high number of appropriate voltage vectors and their corresponding duty cycles can be selected as candidate vectors to reduce torque ripples by looking up the table. Furthermore, small vectors are incorporated into the table to ensure the neutral-point potential balance with the numerous candidate vectors. The feasibility and effectiveness of the proposed algorithm are verified by both simulations and experiments.