• 전력전자학회논문지
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• 제25권5호
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• pp.385-393
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• 2020

This study introduces an analysis and control method for the variation of neutral point current in a grid-tied three-level neutral point clamped (NPC) converter under various grid imbalance operating conditions. Various fault cases with unbalanced amplitude and phase are systematically categorized and described using a unified metric called the imbalance factor. The fundamental component of neutral point current is generated under grid imbalance cases. The pattern and behavior of this fundamental component of neutral point current highly depend on the imbalance factor regardless of the particular type of grid fault cases. The control scheme for regulating the negative sequential component of AC input current effectively reduces the size of the fundamental component of neutral point current under a wide range of grid imbalance cases. The control scheme will enable a grid-tied three-level NPC converter to operate reliably and stably under various types of grid faults.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.151-152
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• 2016

This paper presents a neutral point deviation compensating control algorithm applied to a 3-level NPC converter under generalized unbalanced ac input conditions. The neutral point deviation is analyzed with a focus on the current flowing out of or into the neutral point of the dc-link in 3-level NPC converter. The model of neutral point deviation and neutral current are also constructed. The positive and negative sequence components of the pole voltages and ac input currents are employed to accurately explain the behavior of 3-level NPC converter and its impact on neutral point deviation. This paper includes the harmonic characteristic of neutral point current under various imbalance AC operating conditions.

• Journal of Power Electronics
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• 제18권6호
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• pp.1866-1878
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• 2018

This paper presents a neutral point deviation and ripple compensation control method for application to 3-level NPC converters. The neutral point deviation and its harmonic components are analyzed with a focus on the average current flowing through the neutral point of the dc-link. This paper also proposes a control scheme to compensate for the neutral point deviation and dominant harmonic components under generalized unbalanced grid operating conditions. The positive and negative sequence components of the pole voltages and ac input currents are employed to accurately explain the behavior of 3-level NPC converters. Simulation and experimental results are presented to verify the validity of the proposed method.

• 전력전자학회논문지
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• 제19권5호
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• pp.407-414
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• 2014

This study proposes a control design for the grid output current and for reducing the neutral-point voltage oscillation through the small-signal modeling of the three-phase grid connected with a three-level neutral-point-clamped (NPC) inverter with LCL filter. The three-level NPC inverter presents an inherent problem: the neutral-point voltage fluctuation caused by the neutral-point current flowing in or out from the neutral point. The small signal modeling consists of averaging, dq0 transformation, perturbing, and linearizing steps performed on a three-phase grid connected to a three-level NPC inverter with LCL filter. The proposed method controls both the grid output and neutral-point currents at every switching period and reduces the neutral-point voltage oscillation. The validity of the proposed method is verified through simulation and experiment.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 연구회 합동 학술발표회 논문집
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• pp.33-37
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• 1998

For the high power variable speed applications, the DCTLI(diode clamped three-level inverter) have been widely used. This paper describes the analysis of the neutral point current of the DCTLI and the improved space vector-based PWM strategy considering the switching frequency of power devices, that minimizes the fluctuation of the neutral point current in spite of high modulation index region and low power factor. It contributes to decrease the capacitance of dc-link capacitor bank and to increase the neutral point voltage controllable region. Especially, even if second (or even) order harmonic is induced in load current (at this situation, is was investigated that the general control method can not suppress the neutral point voltage variation), this PWM can provide effective control method to suppress the neutral point voltage variation. Various simulation results by means of Matlab/Simulation are presented to verify the proposed PWM.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.177-178
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• 2015

This paper presents a neutral point deviation compensating control algorithm applied to a 3-level NPC converter. The neutral point deviation is analyzed with a focus on the current flowing out of or into the neutral point of the dc link. Based on the zero sequence components of the reference voltages, this paper analyzes the neutral point deviation and balancing control for 3-level NPC converter. An analytical method is proposed to calculate the injected zero sequence voltage for NP balancing based on average neutral current. This paper also proposes a control scheme compensating for the neutral point deviation under generalized unbalanced grid operating conditions. The positive and negative sequence components of the pole voltages and ac input currents are employed to accurately explain the behavior of 3-level NPC converter. Simulation and experimental results for a test set up of 30kW are shown to verify the validity of the proposed algorithm.

• 전력전자학회논문지
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• 제25권1호
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• pp.68-71
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• 2020

As a T-type three-level PWM converter has several intrinsic advantages, it has been widely studied for many applications. However, it requires an additional voltage control loop for balancing each DC link voltage. Generally, satisfying this requirement involves the use of an offset voltage to provide a neutral point current without affecting other variables, such as the total DC link voltage and three-phase input current. In this study, the theoretical relationship between the offset voltage and the neutral point current is analyzed. The results can be beneficial for effective voltage balancing controller design. The effectiveness of the analytical modeling is verified by simulation and experimental results.

• Journal of Power Electronics
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• 제3권4호
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• pp.205-214
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• 2003

This paper proposes a simple control strategy based on the discontinuous PWM (DPWM) to balance the DC-link voltage of three-level neutral-point-clamped (NPC) inverter at low modulation index. It introduces new DPWM methods in multi-level inverter and one of them is used for balancing the DC-link voltage. The current flowing in the neutral point of the DC-link causes the fluctuation of the DC-link voltage of the NPC inverter. The proposed DPWM method changes the path and duration time of the neutral point current, which makes the overall fluctuation of the DC-link voltage zero during a sampling time of the reference voltage vector. Therefore, by using the proposed strategy, the voltage of the DC-link can be balanced fairly well and the voltage ripple of the DC-link is also reduced significantly. Moreover, comparing with conventional methods which have to perform the complicated calculation, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by the experiment.

• Journal of Power Electronics
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• 제12권2호
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• pp.344-356
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• 2012

In recent years, multilevel technology has become an effective and practical solution in the field of moderate and high voltage applications. This paper discusses an APF with a three-level NPC inverter. Obviously, the application of such converter to APFs is hindered by the problem of the voltage unbalance of DC capacitors, which leads to system instability. This paper comprehensively analyzes the theoretical limitations of the neutral-point voltage balancing problem for tracking different harmonic currents utilizing current switching functions from the space vector PWM (SVPWM) point of view. The fluctuation of the neutral point caused by the load currents of certain order harmonic frequency is reported and quantified. Furthermore, this paper presents a close-loop digital control algorithm of the DC voltage for this APF. A PI controller regulates the DC voltage in the outer-loop controller. In the current-loop controller, this paper proposes a simple neutral-point voltage control method. The neutral-point voltage imbalance is restrained by selecting small vectors that will move the neutral-point voltage in the direction opposite the direction of the unbalance. The experiment results illustrate that the performance of the proposed approach is satisfactory.

• Journal of Electrical Engineering and Technology
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• 제10권1호
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• pp.75-82
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• 2015

This paper presents a new technique for enhancing power quality by reducing harmonics in the neutral conductor. Three-Phase Four-Wire (3P4W) system is commonly used where single and three phase loads are connected to Point of Common Coupling (PCC). Due to unbalance loads, the 3P4W distribution system becomes unbalance and current flows in the neutral conductor. If loads are non-linear, then the harmonic content of current will flow in neutral conductor. The neutral current that may flow towards transformer neutral point is compensated by using a series active filter. In order to reduce the harmonic content, the series active filter is connected in series with the neutral conductor by which neutral and phase current harmonics are reduced significantly. In this paper, solar PV based inverter circuit is proposed for compensating neutral current harmonics. The simulation is carried out in MATLAB/SIMULINK and also an experimental setup is developed to verify the effectiveness of the proposed method.