• Journal of Electrical Engineering and Technology
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• 제9권3호
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• pp.1132-1136
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• 2014

In the context of increasing electric energy consumption in a data center, energy efficiency improvement is strongly emphasized. In a data center, electric energy is largely consumed by DC power supply system, which is based on a rectifier composed by multiple parallel converters. Therefore, rectifier efficiency must be improved for minimizing loss of DC power supply system. Rectifier efficiency can be modulated by load allocation to converters because converter efficiency depends on input AC power. In this paper, we propose a new control method to maximize rectifier efficiency. The method can control load allocation to converters by introducing active power converter control scheme and start-and-stop of converters. In order to illustrate optimal load allocations in a rectifier, a maximization problem of rectifier efficiency is formulated as a nonlinear optimization one. The problem is solved by Lagrangian relaxation method and the computation results provide the validity of proposed method.

• Journal of Power Electronics
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• 제17권3호
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• pp.821-834
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• 2017

This paper reports on a single-inductor multiple-output step-up converter with digital control. A systematic analog-to-digital-controller design is explained. The number of digital blocks in the feedback path of the proposed converter has been decreased. The simpler digital pulse-width modulation (DPWM) architecture is then utilized to reduce the power consumption. This architecture has several advantages because counters and a complex digital design are not required. An initially designed unit-delay cell is adopted recursively for the construction of coarse, intermediate, and fine delay blocks. A digital limiter is then designed to allow only useful code for the DPWM. The input voltage is 1.8 V, whereas output voltages are 2 V and 2.2 V. A co-simulation was also conducted utilizing PowerSim and Matlab/Simulink, whereby the 55 nm process was employed in the experimental results to evaluate the performance of the architecture.

• IEIE Transactions on Smart Processing and Computing
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• 제4권1호
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• pp.44-50
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• 2015

This paper presents a high speed synchronous single inductor dual output boost converter using Type-III compensation for power management in smart devices. Maintaining multiple outputs from a single inductor is becoming very important because of inductor the sizes. The uses of high switching frequency, inductor and capacitor sizes are reduced. Owing to synchronous rectification this kind of converter is suitable for SoC. The phase is controlled in time sharing manner for each output. The controller used here is Type-III, which ensures quick settling time and high stability. The outputs are stable within $58{\mu}s$. The simulation results show that the proposed scheme achieves a better overall performance. The input voltage is 1.8V, switching frequency is 5MHz, and the inductor used is 600nH. The output voltages and powers are 2.6V& 3.3V and 147mW &, 230mW respectively.

• Journal of Power Electronics
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• 제16권3호
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• pp.960-969
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• 2016

High-power three-level voltage-source converters are widely utilized in high-performance AC drive systems. In several ultra-power instances, the harmonics on the grid side should be reduced through multiple rectifications. A combined harmonic elimination method that includes a dual primary-side series-connected winding transformer and selective harmonic elimination pulse-width modulation is proposed to eliminate low-order current harmonics on the primary and secondary sides of transformers. Through an analysis of the harmonic influence caused by dead time and DC magnetic bias, a synthetic compensation control strategy is presented to minimize the grid-side harmonics in the dual primary side series-connected winding transformer application. Both simulation and experimental results demonstrate that the proposed control strategy can significantly reduce the converter input current harmonics and eliminates the DC magnetic bias in the transformer.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.189-192
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• 2001

This paper proposed that an AC-DC converter system using multiple buck-chopper operates with four choppers connecting to a number of parallel circuits. To improve these, a large number of soft switching topologies included a resonant circuit have been proposed. And, some simulative results on computer are included to confirm the validity of the analytical results. The partial resonant circuit makes use of an inductor using step-down and a condenser of loss-less snubber. The result is that the switching loss is very low and the efficiency of system is high. And the snubber condenser used in a partial resonant circuit makes charging energy regenerated at input power source for resonant operation. The proposed conversion system is deemed the most suitable for high power applications where the power switching devices are used.

• Journal of Power Electronics
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• 제16권4호
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• pp.1483-1493
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• 2016

Multiple parallel inverters have multiple resonant frequencies that are influenced by many factors. This often results in stability and power quality problems. This paper develops a multiple input multiple output model of grid-connected inverter systems using a closed-loop transfer function. The influence factors of the resonant characteristics are analyzed with the developed model. The analysis results show that the resonant frequency is closely related to the number, type and composition ratio of the parallel inverters. To suppress resonance, a scheme based on virtual impedance is presented, where the virtual impedance is emulated in the vicinity of the resonance frequency. The proposed scheme needs one inverter with virtual impedance control, which reduces the design complexity of the other inverter controllers. Simulation and experimental tests are carried out on two single phase converter-based setups. The results validate the correctness of the model, the analytical results and the resonant suppressing scheme.