• Journal of Satellite, Information and Communications
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• v.12 no.4
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• pp.131-140
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• 2017

Multipath TCP (MPTCP) is a transport layer protocol that simultaneously transmits data using multiple interfaces. MPTCP is superior to existing TCP in network environment with homogeneous subflows, but it shows worse performance compared to existing TCP in network environment with bufferbloat. If a bufferbloat occurs in one of the MPTCP multipaths, the packet will not arrive at the MPTCP receive buffer due to a sudden increase in delay time, resulting in a HoL blocking phenomenon. It makes the receive window of the other path to be zero. In this paper, we apply Adaptive Random Early Detection (ARED), Controlled Delay (CoDel) and Proportional Integral Controller Enhanced (PIE) among the proposed Active Queue Management (AQM) to limit the delay of bufferbloat path. Experiments were conducted to improve the performance of MPTCP in heterogeneous networks. In order to carry out the experiment, we constructed a Linux-based testbed and compared the MPTCP performance with that of the existing droptail.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.6
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• pp.124-131
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• 2014

This paper describes a design of an adaptive baseband modem based on TDMA(time division multiple access) with a relay protocol function for wireless personal area networks. The designed baseband modem is controlled by a master synchronization signal and can be configured a relay network up to 14 hops. For efficient data relay communications, the internal buffer design is optimized by implementing a priority memory bus controller to a single port memory. And the priority memory bus controller is also designed to minimize the number of synthesized logic gates. To implement the synchronization function of the narrowband TDMA relay communication, the number of gates has been reduced by dividing the frame synchronization circuits and the network slot synchronization circuits. By using these methods, the number of gates are used about 37%(34,000 gates) on Xilinx FPGA XC6SLX9 which has 90,000 gates. For the 1024-bit frame size with a 32-bit synchronization word, the communication reception rate is 96.4%. The measured maximum transmission delay of the designed baseband modem is 230.4 msec for the 14-hop relay communication.

• Journal of the Korea Society for Simulation
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• v.17 no.2
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• pp.49-61
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• 2008

Most battleship warfare M&S systems run relatively slow and the simulation results are often unfair since the system should interact with human operators(controller and/or gamer). To deal with these problems, we have proposed the agent-based battleship warfare M&S system which interact with multiple agent systems instead of human operators. Agent-based M&S system may be able to efficiently support the analysis of effectiveness and/or the operational tactics development of given warfare by providing autonomous reasoning capabilities without the intervention of human controller. To do this, the paper propose the design concept and methodology using the advanced modeling and simulation framework as well as autonomous agent design principle. Several simulation tests performed on the battleship warfare case study on Korea Yellow sea will illustrate our techniques.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.587-594
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• 2005

In the paper, after we propose a viterbi decoder which has multiple buffering and parallel processing decoding scheme through expanding time-divided imput signal, and map a FPGA, we implement a channel coding system together with PC-based software. Continuous input signal is buffered as order of decoding length and is parallel decoded using a high speed cell for viterbi decoding. Output data rate increases linearly with the cell formed the viterbi decoder, and flexible operation can be satisfied by programming controller and modifying input buffer. The tell for viterbi decoder consists of HD block for calculating hamming distance, CM block for calculating value in each state, TB block for trace-back operation, and LIFO. The implemented cell of viterbi decoder used 351 LAB(Logic Arrary Block) and stably operated in maximum 139MHz in APEX20KC EP20K600CB652-7 FPGA of ALTERA. The whole viterbi decoder including viterbi decoding cells, input/output buffers, and a controller occupied the hardware resource of $23\%$ and has the output data rate of 1Gbps.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.12 no.1
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• pp.211-216
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• 2012

Control Theory for continuous-time system has been well developed. Due to the development of computer technology, digital control scheme are employed in many areas. When delays are in control systems, it is hard to control the system efficiently. Delays by controller-to-actuator and sensor-to-controller deteriorate control performance and could possibly destabilize the overall system. In this paper, a new approximated discretization method and digital design for control systems with multiple state, input and output delays and a generalized bilinear transformation method with a tunable parameter are also provided, which can re-transform the integer time-delayed discrete-time model to its continuous-time model. Illustrative example is given to demonstrate the effectiveness of the developed method.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.5
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• pp.341-349
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• 2003

A real time interactive controller (spectrometer) for magnetic resonance imaging (MRI) system has been developed using high speed digital signal processors (DSP). The controller generates radio frequency (rf) waveforms and audio frequency gradient waveforms and controls multiple receivers for data acquisition. By employing DSPs having high computational power (e.g., TMS320C670l) real time generation of complicated gradient waveforms and interactive control of selection planes are possible, which are important features in real-time imaging of moving organs, e.g., cardiac imaging. The spectrometer was successfully implemented at a 1.5 Tesla whole body MRI system for clinical application. Performance of the spectrometer is verified by various experiments including high- speed imaging such as fast spin echo (FSE) and echo planar imaging (EPI). These high-speed imaging techniques reduce measurement time, however, usually intensify artifact if there is any systematic phase error or jitter in the synchronization between the transmitter, receiver, and gradients.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.38 no.3
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• pp.217-227
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• 1989

A process control graphic system is proposed as an efficient tool for monitoring the operation of power plant. It uses the multi-processor structure with 60 Kbyte shared memory as an implemental type of the distributed computer system, so that it is flexible, functionally extensible, and applicable to real-time process. The shared memory is used as a real-time database handling the process values and operator's commands. The database files, generated by the user-interactive graphic editor developed for the system or text editor, have the characteristics of simplicity and user-friendliness. The process control graphic system, that can monitor the operation of boiler and function as a backup controller in case of failure in boiler controller, is applied to Ulsan power plant. As a result, it displays the operating data of the boiler process without error by 14 pages of color graphic image according to the operation menu, and additionally functions well as a fault-tolerant control system.

• Journal of Power Electronics
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• v.15 no.1
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• pp.146-159
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• 2015

Since the power capacity needed for the propulsion of large ships is very large, a multiphase AC induction propulsion mode is generally adopted to meet the higher requirements of reliability, redundancy and maintainability. This paper gives a detailed description of the development of a 20MW fifteen-phase PWM driver for advanced fifteen-phase propulsion induction motors with a special third-harmonic injection in terms of the main circuit hardware, control system design, experiments, etc. The adoption of the modular design method for the main circuit hardware design can make the enclosed mechanical structure simple and maintainable. It can also avoid the larger switch stresses caused by the multiple turn on of the IGBTs in conventional large-capacity converter systems. The use of the distributed controller design method based on a high-speed fiber-optic ring net for the control system can overcome such disadvantages as the poor reliability and long maintenance times arising from the conventional centralized controller which is designed according to point-to-point communication. Finally, the performance of the 20MW PWM driver is verified by experimentation on a new fifteen-phase induction propulsion motor.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05a
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• pp.21-25
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• 2002

Activated sludge processes are widely used in biological wastewater treatment processes. The main motivation of this research is to develop an intelligent control strategy for activated sludge process (ASP). ASP is a complex and nonlinear dynamic system because of the characteristic of wastewater, the change in influent rate, weather conditions, and so on. The mathematical model of ASP also includes uncertainties which are ignored or not considered by process engineer or controller designer. The ASP model based on Matlab/Simulink is designed in this paper. The performance of the model is tested by IWA (International Water Association) and COST (European Cooperation in the filed of Scientific and Technical Research) data that include steady-state results during 14 days. In this paper, fuzzy logic control approach is applied to control the DO (dissolved oxygen) concentration. The fuzzy logic controller that includes two inputs and one output can adjust air flowrate. Also, this paper introduces the remote monitoring and control system that is applied for the CSTR (Continuously Stirred Tank Reactor) wastewater treatment system. The CSTR plant has a local control and the remote monitoring system which is contained communication parts which consist of LAN (Local Area Network) network and CDMA (Code Division Multiple Access) wireless module. Remote control and monitoring systems are constructed in the laboratory.

• Proceedings of the KIEE Conference
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• 1996.07b
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• pp.1243-1247
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• 1996

In this paper, a small PLC system is designed and developed for the distributed building control and fire control system. It uses 8031, a 8-bit micro controller from Intel Inc. The size of the PLC is $7cm{\times}8cm$ and the PLC can accept 4 sensor inputs and drive 4 relay outputs, which operates at 24V. Multiple access of PLC by one host computer is implemented by assigning a unique 10 to each PLC, which ranges from 0 to 126. The operation starts by sending a command packet from host computer to a PLC and the PLC of the same 10 fetches the command packet by comparing the first byte of the command packet with its own 10. The PLC is programmed to perform a various functions and the function is selected by the content of the command byte, which is the second byte of the command packet. The third byte, which is the last byte, is a checksum byte. The checksum byte is the sum of the first byte and the second byte and is used to detect the communication error. Depending on the content of the command byte, PLC performs the desired function and returns the response packet back to the host computer. The response packet is also a three-byte packet, 10 byte, response byte and checksum byte. For the independent operation of PLC without being controlled by the host computer, variable length RULE data packet is sent to PLC. In case the communication line is broken, the PLC perform the independent operation by referencing the RULE data. The applicable areas are; building automation system, distributed factory automation, measurement of temperature of toxic or dangerous area.