• 반도체디스플레이기술학회지
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• 제13권4호
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• pp.43-48
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• 2014

Two-level inverter has some disadvantages like high harmonics contained in the output current, efficiency limit and stress to switching device as IGBT and FET. Many researches have reported multi-level inverter to complement two-level inverter of problems. In this paper, we suggest MPPT algorithm of multi-string three-level solar inverter that considered nowadays. We added midpoint controller in order to implement the MPPT algorithm because the three-level inverter has to need midpoint controller and procured the stability of direct current link. We verify the superiority of multi-string T-Type inverter and the algorithm we suggested with solar irradiance variation experiment and MPPT efficiency measurement. The MPPT efficiency was confirmed with a high efficiency more than 99.97%.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2005년도 전력전자학술대회 논문집
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• pp.659-662
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• 2005

In this paper, we proposed the novel hybrid multi-level inverter using combination of the output voltage of transformers to reduce the THD(Total Harmonic Distortion) and improve the waveform of output voltage. The proposed multi-level inverter used the output of transformer which is 1times, 2times, 4times of input of the transformers. So we increased the output voltage from the reduce the number of switching component and transformer. Also, we tested the proposed prototype 15-level inverter to clarify the proposed electric circuit and reasonableness of control signal for the proposed multi -level PWM inverter.

• Journal of Electrical Engineering and information Science
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• 제1권2호
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• pp.109-118
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• 1996

This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

• 전기학회논문지
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• 제58권12호
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• pp.2359-2369
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• 2009

The study on the multi-level inverter has been increasingly progressing to reduce the switching loss and improve the THD of output current in photovoltaic inverter. Recently, the main topics of multi-level inverter are to reduce the number of devices maintaining the power quality. Therefore, the novel topology was proposed for these problem which is composed of the isolated H-bridge multi-level inverter using the three phase low frequency transformer. The proposed multi-level inverter may not be need for a independent DC power, diode and capacitor. Specially, It has a advantage in generating high voltage source. The proposed approach is verified through simulation and experiment.

• Journal of Power Electronics
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• 제15권5호
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• pp.1318-1328
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• 2015

The photovoltaic (PV) power conditioning system for small-scale applications has gained significant interest in the past few decades. However, the standalone mode of operation has been rarely approached. This paper presents a two-stage multi-level micro-inverter topology that considers the different operation modes. A multi-output flyback converter provides both the DC-Link voltage balancing for the multi-level inverter side and maximum power point tracking control in grid connection mode in the PV stage. A modified H-bridge multi-level inverter topology is included for the AC output stage. The multi-level inverter lowers the total harmonic distortion and overall ratings of the power semiconductor switches. The proposed micro-inverter topology can help to decrease the size and cost of the PV system. Transient analysis and controller design of this micro-inverter have been proposed for stand-alone and grid-connected modes. Finally, the system performance was verified using a 120 W hardware prototype.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제11B권3호
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• pp.112-118
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• 2001

In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.

• 전기학회논문지
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• 제56권6호
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• pp.1071-1079
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• 2007

In this paper, a novel space vector control method for isolated multi-level inverter using 3-phase low frequency transformers is proposed. This method is based on the simplification of the space-vector diagram of a five-level inverter using calculated table into fully programming method. The execution time of the proposed method is about same as that of the method using calculated table. Also, the proposed method is easily applied to other case level inverter. We applied this method into the 3-phase IHCML inverter using common arm. It makes possible to use a single DC power source due to employing low frequency transformers. In this inverter, the number of transformers could be reduced compare with an exiting 3-phase multi-level inverter using single phase transformer. In addition, this method generates very low harmonic distortion operation with nearly fundamental switching frequency. Finally, We tested multi-level inverter to clarify electric circuit and reasonableness through Matlab simulation and experiment by using prototype inverter.

• 전력전자학회논문지
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• 제20권4호
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• pp.337-343
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• 2015

The multi-level inverters are highly efficient for high-power and medium-voltage AC driving applications, such as high-speed railway systems and renewable energy resources, because such inverters generate lower total harmonic distortion (THD) and electromagnetic interface (EMI). Lower switching stress occurs on switching devices compared with conventional two-level inverters. Depending on the multi-level inverter topology, the required components and number of switching devices are different, influencing the overall efficiency. Comparative studies of multi-level inverters based on loss analysis and output characteristic are necessary to apply multi-level inverters in high-power AC conversion systems. This paper proposes a theoretical loss analysis method based on piecewise linearization of characteristic curves of power semiconductor devices as well as loss analysis and output performance comparison of five-level neutral-point clamped, flying capacitor inverters, and high-level cascaded H-bridge multi-level inverters.

• 전력전자학회논문지
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• 제12권2호
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• pp.149-156
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• 2007

3상 변압기를 이용한 멀티레벨 인버터는 단상 변압기를 이용한 경우에 비해 변압기 수를 줄일 수 있으며, 변압기 이용률을 증대시켜 변압기 크기를 줄일 수 있다는 장점이 있으나 많은 수의 스위치 소자가 필요하다는 단점이 있다. 이에 본 논문에서는 공통암을 이용하여 스위치 수를 줄인 3상 변압기 절연 멀티레벨 인버터를 제안한다. 제안한 인버터는 스위칭 주파수를 기본주파수와 동일하게 제어하면서 등면적 법에 의해 도통각을 제어 하여 출력전압의 THD 감소 및 스위치 손실을 줄였다. 또한 Matlab을 이용한 시뮬레이션 및 실험을 통하여 제안된 방식의 타당성을 검증 하였다.

• 전력전자학회논문지
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• 제17권4호
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• pp.291-297
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• 2012

Recently, Switching devices become cheaper, depending on the multi-level inverters are considered as the power-conversion systems for high-power and power-quality demanding applications. The multi-level inverters can reduce the THD(Total Harmonic Distortion) as the output which is similar sinusoidal waveform by synthesizing several capacitor DC voltages. However it has some disadvantages such as increased number of components, complex PWM control method. Therefore, this paper is proposed the new multi-level inverter topology using an new H-bridge output stage with a bidirectional auxiliary switch. The proposed topology is the 4-level 3-phase PWM inverter with less switching part than conventional multi-level inverters and reactive power control possible. In order to understand the new multi-level inverter, topology analysis and switching patterns and modes according to the current loop are described in this paper. The proposed multi-level inverter topology is validated through PSIM simulation and the experimental results are provided from a prototype.