• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.597-598
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• 2006

This paper describes a development of a new $1.4{\times}1.1$ and $2.0{\times}1.4mm$ RF SAW filters made by PCB substrate instead of HTCC package, and this technology can reduce the cost of materials down to 40%. We have investigated the multi-layered PCB substrate structures and raw materials to find out the optimal flip-bonding condition between the $LiTaO_3$ wafer and PCB substrates. Also the optimal materials and processing conditions of epoxy laminating film were found out through the experiments which can reduce the bending moment caused by the difference of the thermal expansion between the PCB substrate and laminating film. The new PCB SAW filter shows good electrical and reliability performances with respect to the present SAW filters.

• Journal of Electrical Engineering and Technology
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• v.7 no.4
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• pp.582-588
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• 2012

In this paper, a highly miniaturized and performed UWB bandpass filter has been newly designed and implemented by embedding all the passive elements into a multi-layered PCB substrate with high dielectric $SrTiO_3$ composite film for 3.1 - 4.75 GHz compact UWB system applications. The high dielectric composite film was utilized to increase the capacitance densities and quality factors of capacitors embedded into the PCB. In order to reduce the size of the filter and avoid parasitic EM coupling between the embedded filter circuit elements, it was designed by using a $3^{rd}$ order Chebyshev circuit topology and a capacitive coupled transformation technology. Independent transmission zeros were also applied for improving the attenuation of the filter at the desired stopbands. The measured insertion and return losses in the passband were better than 1.68 and 12 dB, with a minimum value of 0.78 dB. The transmission zeros of the measured response were occurred at 2.2 and 5.15 GHz resulting in excellent suppressions of 31 and 20 dB at WLAN bands of 2.4 and 5.15 GHz, respectively. The size of the fabricated bandpass filter was $2.9{\times}2.8{\times}0.55(H)mm^3$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.4
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• pp.357-365
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• 2013

The 4 by 4 series slot sub-array antenna is proposed using substrate integrated waveguide(SIW) technology for 35 GHz of Ka band application. The proposed antenna is realized with multi-layered structure for compact size and easy integration features. 4 by 4 radiating slots are arrayed on top PCB with equal spacing and the feeding SIWs are arranged on middle and bottom PCBs for uniform power distribution. The multi-layered antenna is realized using RT/Duroid 5880 that has dielectric constant of 2.2 and the total antenna size is $750.76mm^2$. The individual parts such as radiators and feeding networks are simulated using full-wave simulator CST MWS. Furthermore, the total sub-array antenna also fabricated and measured the electrical performances such as impedance bandwidth under the criteria of -10 dB(490 MHz), maximum gain(18.02 dBi), sidelobe level(SLL)(-11.0 dB), and cross polarization discrimination (XPD)(-20.16 dB).

• Journal of Advanced Navigation Technology
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• v.14 no.1
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• pp.11-19
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• 2010

In this paper, H-plane filtering-horn antenna operating at millimeter frequency band is proposed with embedded filter and three-layered dielectric lens for frequency selection and maintenance of main beam direction, respectively. The waveguide-typed filter and H-plane sectoral horn antenna are replaced with considerably size-reduced PCB substrate-typed filtering antenna using via fences and several posts. The waveguide-typed filter and H-plane sectoral horn antenna were designed in air-filled waveguide and then combined into size-reduced PCB substrate. For the control of the thickness of dielectric lens, single and multi dielectric lens have been employed. As a result of antenna gain, 8 and 13.5 dBi have been obtained at 41.5 GHz, respectively, from the simulations of single and multi-lens antennas.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.8-13
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• 2006

Recent RF SAW filters are made using a HTCC package with a CSP(chip scale Package) technology. This paper describes a development of a new $1.4{\times}1.1\;and\;2.0{\times}1.4mm$ RF SAW liters made by PCB substrate instead of HTCC package, and this technology can reduce the cost of materials down to 40%. We have investigated the multi-layered PCB substrate structures and raw materials to find out the optimal flip-bonding condition between the $LiTaO_3$ wafer and PCB substrates. Also the optimal materials and processing conditions of epoxy laminating film were found out through the experiments which can reduce the bending moment caused by the difference of the thermal expansion between the PCB substrate and laminating film. The new PCB SAW filter shows good electrical and reliability performances with respect to the present SAW filters.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.3
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• pp.16-22
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• 2013

A general characterization procedure based on the extraction of a 2n-port admittance matrix corresponding to n uniform coupled lines on the multi-layered substrate using the Finite-Difference Time-Domain (FDTD) technique is presented. In this paper, the frequency-dependent normal mode parameters are obtained from the 2n-port admittance matrix to analyze multi-layered asymmetric coupled line structure, which in turn provides the frequency-dependent propagation constant, effective dielectric constant, and line-mode characteristic impedances. To illustrate the technique, several practical coupled line structures on multi-layered substrate have been simulated. Especially, embedded conductor structures have been simulated. Comparisons with Spectral Domain Method are given, and their results agree well. It is shown that the FDTD based time domain characterization procedure is an excellent broadband simulation tool for the design of multiconductor coupled lines on multilayered PCBs as well as thick or thin hybrid structures.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.319-319
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• 2013

Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.