• Spatial Information Research
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• v.18 no.1
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• pp.57-67
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• 2010

Recently, 2D GIS technology is applied for urban facility management. However, urban facilities are located in 3D space and the information loss is occurring during data abstraction from 3D urban facility to 2D object. Also, the number of urban facilities is increasing steadily and most of urban facilities are located in underground space in the city. Therefore 2D urban facility management system has a limitation on visualization and management for a large number of urban facilities. In this paper, a multi-dimensions urban facility management system based on multi-texture technology is proposed. The proposed system reduces the information loss and improves the readability of information by visualizing urban facilities on 3D virtual space. A multi-texturing technology is applied for integrating of 2D vector data and 3D raster data, and a multi-thread technology is used for improving speed and performance of the system. The proposed technology can be used as a guideline for urban facility monitoring as providing visual information of a facility status with 3D image and facility data.

• The KIPS Transactions:PartA
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• v.19A no.2
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• pp.93-100
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• 2012

LLRP (Low-Level Reader Protocol) specifies an interface between RFID readers and RFID applications, also called LLRP servers and clients respectively. An LLRP server should concurrently execute various functions. This paper designs an LLRP server of a multi-threaded architecture. For that, (i) the operational procedure between LLRP servers and clients is investigated, (ii) the functional requirements of LLRP servers are presented, (iii) the operation of an LLRP server is decomposed into several threads to satisfy those functional requirements, and (iv) the operational procedure is further examined in thread-level. To validate the designed architecture, it is modeled and simulated by using the DEVS formalism which specifies discrete event systems in a hierarchical, modular manner. From the simulation result, we can conclude that the proposed architecture conforms the LLRP standard and satisfies all the given functional requirements.

• The KIPS Transactions:PartB
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• v.12B no.4 s.100
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• pp.459-464
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• 2005

The online game system could be largely divided into two parts: servers and clients. Clients accesses to a game server and analyzes the packets transmitted from a server. A game server manages users information and database. U a game server allows a new client to access the server to execute a game, it should accept the access request of the new client maintaining the online connection of the existing users. In this paper, we compare Process method and Thread method within the multiple jobs process methods of a server. Then we propose an asymmetric distributed multi server architecture that is adequate to asymmetric distributed architecture that is widely applied to most game servers. The proposed asymmetric distributed multi server architecture includes login server, game server, communication server and database server to perform its own feature independently. Comparing its other architectures, it shows better performance economically and technically. Especially it improves the stability and expandability of a server.

• Journal of Broadcast Engineering
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• v.23 no.5
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• pp.682-692
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• 2018

In this paper, we propose an ARQ packet error control scheme using multiple threads in delivering massive capacity of multimedia based on MMT(MPEG Media Transport) protocol. On the sending side, each frame that constitutes an image is packetized into MMT packets based on MMT protocol. The header of the packet stores the sequence number of the frames contained in the packet and the time of presentation information. The payload of the packet stores the direct information that comprises the frame. The generated MMT packet is transmitted to the IP network. The receiving side checks if any error has occurred in the received packet. For any identified error, it controls the error through ARQ error control scheme and reconfigure the frame according to the information stored in the header of the received packet. At this point, a multi-threading based transport design is constructed so that each thread takes over a single frame, which increases the transmission efficiency of massive capacity multimedia. The efficiency of the multi-threading transport method is verified by solving the problems that might arise when using a single-thread approach if packets with errors are retransmitted.

• The KIPS Transactions:PartA
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• v.15A no.5
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• pp.259-268
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• 2008

Multi-Core processors have become main-stream microprocessors in recent years. Servers based on these multi-core processors are widely adopted in High Performance Computing (HPC) and commercial business applications as well. These servers provide increased level of parallelism, thus can potentially boost the performance for applications. However, the shared resources among multiple cores on the same chip can become hot spots and act as performance bottlenecks. Therefore it is essential to optimize the use of shared resources for high performance and scalability for the multi-core servers. In this paper, we conduct experimental studies to analyze the positive and negative effects of the resource sharing on the performance of HPC applications. Through the analyses we also characterize the performance of multi-core servers.

• The KIPS Transactions:PartC
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• v.10C no.1
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• pp.87-94
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• 2003

As the number of the Internet users increases explosively, a solution for this problem is web caching. So, many techniques on improving cache server performance have been suggested. In this paper, we analyze the cause of the bottleneck in cache servers, and propose an arbitral thread and delayed caching mechanism as a solution. We use an arbitral thread in order to provide a quick service to user requests through eliminating the ready multi-thread search problem in case of disk writing operation. We also use delayed caching in order to provide stable system operation through avoiding overloaded disk operation and queue threshold. Proposed cache server is implemented through modification on SQUlD cache server, and we compare its performance with the original SQUID cache server.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.7
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• pp.1723-1728
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• 2010

In this paper we concentrate design and develop method about Multi-Channel Internet Radio Platform to broadcast music contents in large outlet and between spaces to protect music contents which have drastically widespread demage. we provide application concept and design rule of hardware path for Multi-Channel Connection and Multi Stream.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1383-1386
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• 2003

In this paper, an ALU for Simultaneous Multi-Threading (SMT) microprocessors is designed. The SMT architecture improves notably performance and utilization of processes compared with conventional superscalar architectures by executing instructions from multiple threads at the same time. This ALU adopts data bypassing method to process multi-threads. And it can flush instructions in the same thread that generate exceptions such as branch misprediction. interrupt etc, performance of SMT microprocessors with data bypassing and exception handler can be improved.

• Proceedings of the KAIS Fall Conference
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• 2011.05b
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• pp.761-764
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• 2011

본 연구에서는 대면적 백색광 간섭계의 개발과 개발 되어진 대면적 백색광 간섭계의 고속화를 위하여 Multi-PC를 이용한 동기화 이미지 획득 및 이미지 분할연산과 최적의 Multi-Thread 구성을 통한 영역분할 ROI 알고리즘에 대한 연구결과를 기술하였다.

• Proceedings of the Korean Information Science Society Conference
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• 2003.04d
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• pp.94-96
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• 2003

맡은 사용자 영역의 프로그램들이 확장성과 성능 향상을 목적으로 다중 프로세스 모델에서 다중 스레드 모델로 바뀌고 있다. 웹 서버도 폭발적으로 증가하는 사용자 요청을 수용할 수 있도록 확장성과 성능 향상을 위해서 다중 스레드 모델을 적용하였다. 본 논문에서는 다중 프로세스 모델을 적용한 웹 서버와 다중 프로세스/다중 스레드 모델을 적용한 웹 서버에 대한 성능을 여러 운영체제 환경에서 평가하였다. 실험 결과 전체적으로 다중 프로세스 모델이 다중 스레드 모델보다 더 좋은 성능과 안정성을 보였다.