• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 D
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• pp.2556-2558
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• 2002

In this paper, the design guideline of communication interrace module for home-appliances is proposed. The requirements of the interface between white-goods and communication module are analyzed. Finally, the proposed interface structure is implemented using PLC technology.

• 설비공학논문집
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• 제24권3호
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• pp.265-270
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• 2012

A finned tube type heat exchange module has been proposed for a multi-burner water tube boiler. Fin density and length increase in streamwise direction to equalize the evaporation for each module, which makes it difficult to apply conventional bulk design procedure. The design program has been improved by updating data for every row of tubes along the flow. A numerical simulation has been also conducted to evaluate the effect of inlet conditions and validated with experiment. The heat transfer of the first row has been underpredicted by the conventional Zhukauskas correlation, since the acceleration of the flow due to the blockage is not fully inflected. The fin tip temperature is also underpredicted by Bessel solution, because of the interaction with neighboring fins.

• 한국컴퓨터정보학회논문지
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• 제7권2호
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• pp.53-58
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• 2002

인터넷 사용의 일반화는 정보보호라는 새로운 도구화를 요구하게 되었다. 따라서 정보시스템에 대한 침입, 정보 탈취, 변경 및 훼손 또는 의도적인 유출에 따르는 정보 보호는 시스템보호를 위한 시스템사용자 인준 문제에서 외부로부터 침입 탐지의 필요성이 요구된다. 그러므로 이 문제에서 여러 가지 사례의 지능화 침입 수법에 대한 호스트 로그(host log)를 분석하고, 네트워크_패킷(network_packet)을 분석해 대규모 네트워크 환경에서 이용할 수 있는 침입 탐지결정모듈 PUM(Processing Unit Module)설계를 제안한다.

• 한국CDE학회논문집
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• 제2권2호
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• pp.111-121
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• 1997

This study intends to develop a fixture planning module as a part of the planning system for cutting. The fixture module uses machine learning method to reuse previous failure results so that the system can reduce the repeated failures. Machine learning is one of efforts to incorporate human reasoning ability into a computerized system. A human expert designs better than a novice does because he has a wide experience in a specific area. This study implements the machine learning algorithm to have a wide experience in the fixture planning area as a human expert does. When the fixture planner finds a setup failure for the suggested operations by a process planner, it makes the process planner store its attributes and other information for the failed setup. Then the process planner applies the learned knowledge when it meets a similar case so that the planner can reduce possibility of setup failure. Also the system can teach a novice user by showing a failed setup with a modified setup.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -3
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• pp.2067-2070
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• 2002

In this paper, a VLSI architecture for transform and quantization module, which consists of 2D-DCT, quantization, AC/DC prediction block, scan conversion, inverse quantization and 2D-IDCT, is presented. The architecture of the module is designed to handle a macroblock data within 1064 cycles and suitable for MPEG-4 video codec handling CIF image formats. Only single 1-D DCT/IDCT cores are used for the design instead of 2-D DCT/IDCT, respectively. 1-bit serial distributed arithmetic architecture is adopted for 1-D DCT/IDCT to reduce the hardware area in this architecture. As the result, the maximum utilization of hardware can be achieved, and power consumption can be minimized. The proposed design is operated on 27MHz clock. The experimental results show that the accuracy of DCT and IDCT meet the IEEE specification.

• 한국초전도ㆍ저온공학회논문지
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• 제21권4호
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• pp.39-43
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• 2019

The breaking of a circuit in DC grid could pose a challenge because of the absence of zero-crossing instant for both current and voltage when a fault occurs. An additional fault current limiting function will be very helpful for reducing the burden of the DC circuit breaker by limiting the fault current to a reasonable value. In this paper, we studied the overcurrent characteristics of several HTS conductors so that we could use the selected conductors for the basic design work of a resistive type fault current limiting module as a part of the circuit breaking system. According to the short-circuit test results, we suggested and compared two different basic design parameters of the HTS fault current limiting module, which will be connected in series to the DC circuit breaker.

• 전자공학회논문지A
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• 제30A권6호
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• pp.49-57
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• 1993

In the paper, we describe the design of a pipelined datapath synthesis system for DSP applications. Taking SFG (Signal Flow Graph) in schematic as inputs, the system generates pipelined datapaths automatically through scheduling and module allocation processes. For efficient hardware synthesis, scheduling and module allocation algorithms are proposed. The proposed scheduling algorithm is of iterative/constructive nature, where the measure of equi-distribution of operations to partitions is adopted as the objective function. Module allocation is performed to reduce the interconnection cost from the initial allocation. In the experiment, we compare the results with those of other systems and show the effectiveness of the proposed algorithms.

• 산업경영시스템학회지
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• 제30권4호
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• pp.133-140
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• 2007

This study aims to design and implement a learning evaluation system using .NET which is developed by Microsoft. .NET technology supports higher processing speed than ASP technology. The learning evaluation system is based on the web, consists of administrator module, questioner module and student module. The functions of the system, i.e., providing test questions, performing test, and evaluating result of test are achieving on the web in real time. Even when many users use this system, the system is stable and has a speed response time.

• 한국건축시공학회:학술대회논문집
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• 한국건축시공학회 2013년도 추계 학술논문 발표대회
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• pp.220-221
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• 2013

Exterior walls are designed and constructed through design focused exterior wall system. Nowadays, freeform facade design has been changing according to material, form and function of the exterior wall system. Especially, curtain wall facade system is designed and manufactured using solar shading faces. However, the traditional method have a lot of difficulties in the currently performing technology for curtain wall facade. It is important to make the freeform facade components that integrated as a surface of freeform buildings. Therefore it is necessary to develop unit module construction method for freeform facade.

• 전기학회논문지
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• 제58권10호
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• pp.1962-1967
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• 2009

This paper deals with a design of a platform to simulate PRT vehicle operational control algorithms using on-board embedded process board. The configuration of the platform is composed of the central control module, the station control module, man-machine interface and monitoring module. Since PRT system needs inherently very reliable vehicle operational control algorithm in order to avoid the impact between vehicles, it is very important to construct a simulation platform to test a designed vehicle operational control algorithm during the development process For the test of the proposed platform a path of the each moving vehicle is predefined in the central control system before the dispatch order is given to the vehicle. The simulation results show the effectiveness of the proposed simulation platform for test and evaluation of the PRT operational control algorithms.