• 정보처리학회논문지:컴퓨터 및 통신 시스템
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• 제12권5호
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• pp.157-164
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• 2023

자바의 최신 기능인 함수 인터페이스와 람다식에 대한 의미구조를 명세하는 것은 향후 유사한 기능을 설계할 때 참고할 수 있고 표준화하는 과정이나 최적화된 번역기를 구현하는 과정에서도 필요하다. 본 연구에서는 자바의 함수 인터페이스와 람다식에 대한 의미구조를 표현하기 위해 기존의 작용식을 수정하고 업그레이드해서 함수 인터페이스와 람다식의 정적·동적 의미구조를 표현하는 작용식 3.0을 새롭게 제시한다. 작용식 3.0에 명세된 의미구조를 자바로 구현해 자바 프로그램들에 대한 실행시간을 측정하고 시뮬레이션을 통해 작용식 3.0이 구현가능한 실제적인 의미구조 명세법인 것을 입증한다. 판독성(Readability) 측면, 모듈성(Modularity) 측면, 확장성(Extensibility) 측면, 융통성(Flexibility) 측면에서 대표적인 의미구조 표현법과 작용식 3.0을 비교하여 작용식 3.0의 우월성을 확인하고자 한다.

• 한국정보처리학회논문지
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• 제6권11호
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• pp.2989-3000
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• 1999

Until now, most Intelligent Tutoring Systems are lacking in the modularity, the extensibility of the system, and the flexibility in the dynamic environment due to the static exchanges of knowledge among modules. To overcome these flexibility in the dynamic due to the static exchanges of knowledge among modules. To overcome these problems, we will suggest, in this paper, a Distance Intelligent Tutoring Framework, called DELFOM, based on the multiagent to cope with the various and complicated learner's requests. We could make different types of learning systems by simply changing the contents of DELFOM External that is variant part of DELFOM. This framework, therefore, provides software reuse and the extensibility based on object-oriented paradigm. And we will propose two different distance learning systems using DELFOM. Therefore this framework gives the developer/the learner the effective and easy development/learning environment. DELFOM is implemented using CORBA and Java for the network transparency and platform independence.

• 호남수학학술지
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• 제34권3호
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• pp.351-373
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• 2012

We investigate the lattice structure of various sublattices of the lattice of interval-valued fuzzy subrings of a given ring. We prove that a special class of interval-valued fuzzy ideals of a ring. Finally, we show that the lattice of interval-valued fuzzy ideals of R is not complemented[resp. has no atoms(dual atoms)].

• 한국벤처창업학회:학술대회논문집
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• 한국벤처창업학회 2017년도 통합학술대회
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• pp.37-47
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• 2017

The digital multi-sided platform has led the growth of industries. Accelerating this growth, generativity allowed innovation based on boundary-less modularity. Online games are a rich source of research but most of the research is dedicated in examining only the online game itself. However, there is a growing need to understand online games in an ecosystem level for a new phase of evolution is starting based on generativity. With generativity, online game users now make new graphics and quest that can be added and shared to the already existing game environment. The ecosystem is moving towards finding an amicable multi-sided distribution platform for these user generated game contents. Preliminary data suggest the possibility of actual connection between generativity and users' game engagement. Interviews and surveys will be prepared to find out the details of the possible relationship and how the ecosystem will shape accordingly.

• 한국전산유체공학회지
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• 제11권3호
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• pp.1-7
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• 2006

Euler and Navier-Stokes flow analyses for helicopter rotor in hover were performed as low and high fidelity analysis models respectively for the future multidisciplinary design optimization(MDO). These design-oriented analyses possess several attributes such as variable complexity, sensitivity-computation capability and modularity which analysis models involved in MDO are recommended to provide with. To realize PC-based analyses for both fidelity models, reduction of flow domain was made by appling farfield boundary condition based on 3-dimensional point sink with simple momentum theory and also periodic boundary condition in the azimuthal direction. Correlations of thrust, torque and their sensitivities between low and high complexity models were tried to evaluate the applicability of these analysis models in MDO process. It was found that the low-fidelity Euler analysis model predicted inaccurate sensitivity derivatives at relatively high angle of attack.

• 디지털산업정보학회논문지
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• 제16권2호
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• pp.1-9
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• 2020

Many cryptographic and error control coding algorithms rely on finite field GF(2m) arithmetic. Hardware implementation of these algorithms needs an efficient realization of finite field arithmetic operations. Finite field multiplication is complicated among the basic operations, and it is employed in field exponentiation and division operations. Various algorithms and architectures are proposed in the literature for hardware implementation of finite field multiplication to achieve a reduction in area and delay. In this paper, a low area and delay efficient semi-systolic multiplier over finite fields GF(2m) using the modified Montgomery modular multiplication (MMM) is presented. The least significant bit (LSB)-first multiplication and two-level parallel computing scheme are considered to improve the cell delay, latency, and area-time (AT) complexity. The proposed method has the features of regularity, modularity, and unidirectional data flow and offers a considerable improvement in AT complexity compared with related multipliers. The proposed multiplier can be used as a kernel circuit for exponentiation/division and multiplication.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1991년도 하계학술대회 논문집
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• pp.3-12
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• 1991

Fuel cells are electrochemical devices that convert the chemical reaction energy directly into the electrical energy. In a typical fuel cell, gaseous fuel is fed continuously to the anode(negative electrode) compartment and the oxidant(i.e, oxygen from air) is fed continuously to the cathode(positive electrode) compartment; the electrochemical reactions take place at the electrodes to produce an electric current. Many of the operational characteristics of fuel cell systems are superior to those of conventional power generation system because of good efficiency, environmental protection, safty, modularity etc. From those reasons, the fuel cells are considered to be the solution to the future problem of energy conversion. The objective of this paper is to introduce the technical status of fuel cell technologies and our national project for the development of the phosporic acid fuel cell.

• 전자공학회논문지B
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• 제31B권3호
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• pp.60-68
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• 1994

In this paper, the multiplicative algorithm of two polynomials over finite field GF(($p^{m}$) is presented. Using the presented algorithm, the multiple-valued multiplier of the serial input-output modular structure by CCD is constructed. This multiple-valued multiplier on CCD is consisted of three operation units: the multiplicative operation unit, the modular operation unit, and the primitive irreducible polynomial operation unit. The multiplicative operation unit and the primitive irreducible operation unit are composed of the overflow gate, the inhibit gate and mod(p) adder on CCD. The modular operation unit is constructed by two mod(p) adders which are composed of the addition gate, overflow gate and the inhibit gate on CCD. The multiple-valued multiplier on CCD presented here, is simple and regular for wire routing and possesses the property of modularity. Also. it is expansible for the multiplication of two elements on finite field increasing the degree mand suitable for VLSI implementation.

• 한국경영과학회지
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• 제24권2호
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• pp.81-94
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• 1999

ATM network design procedure is different from the current circuit or packet networks design procedure because of the variety of the offered services and the variability of requested bandwidth for each connection of ATM network. A number of optimization models for the link dimensioning of ATM network design have been proposed in the literature. However, most of the literature did not consider the modularity of resources allocated to a transmission path and the non-bifurcation of a VP link over the more than one TP, which are standardized in recent ITU-T Recommendations. In thIs paper, we propose a mathematical model for link dimensioning of ATM networks, based on the network synthesis method and a generalized bin-packing problem. The suggested model satisfies the constraints mentioned in the ITU-T Recommendations. We also propose efficient and practical algorithms for the suggested model. Computational experiment shows that the suggested algorithm gives efficient solutions even for moderate and large-sized networks within reasonable time.

• 한국음향학회:학술대회논문집
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• 한국음향학회 1992년도 학술논문발표회 논문집 제11권 1호
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• pp.29-32
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• 1992

In this paper, a systolic array structure is derived from the realization of 2-D IIR digital filters directed from the SFG(signal flow graph). After realized the 1-D formed partial systolic array, we implemented the complete systolic array to be cascaded 1-D form. The cascading of partial systolic arrays reduce the storage element which sued to delay input signal. 1-D systolic array is derived from that DG is designed through local communication approach and then it mapping to SFG. The derived structure is very simple and has high throughput because during new imput sample is supplied, new output is obtained every sampling period. And broadcast input signal is eliminated. Since the systolic array has property of regularity, modularity, local interconnection and highly synchronized multiprocessing, thus is very suitable for VLSI implementation.