• Title/Summary/Keyword: Mismatch error

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A Study on the Enhancement of Accuracy of Network Analysis Applications in Energy Management Systems (계통운영시스템 계통해석 프로그램 정확도 향상에 관한 연구)

  • Cho, Yoon-Sung
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.12
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    • pp.88-96
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    • 2015
  • This paper describes a new method for enhancing the accuracy of network analysis applications in energy management systems. Topology processing, state estimation, power flow analysis, and contingency analysis play a key factor in the stable and reliable operation of power systems. In this respect, the aim of topology processing is to provide the electrical buses and the electrical islands with the actual state of the power system as input data. The results of topology processing is used to input of other applications. New method, which includes the topology error analysis based on inconsistency check, coherency check, bus mismatch check, and outaged device check is proposed to enhance the accuracy of network analysis. The proposed methodology is conducted by energy management systems and the Korean power systems have been utilized for the test systems.

Robust Adaptive Pole Assignment Control using Pseudo Plant (의사모형화 방법을 이용한 극배치 적응제어기의 강인성 개선)

  • 김국헌;박용식;허명준;양흥석
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.37 no.5
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    • pp.319-326
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    • 1988
  • In the presence of unmodeled dynamics, the robustness of adaptive pole assignment control using new pseudo-plant is presented. The pseudo-plant proposed by Donati et al. is modified as the gain of low pass filter can be set from zero to one. This modified pseudo-plant results in the reduction of modeling error. It is shown that not only this approach is insensitive to input frequency but also it improves the conic condition developed by Ortega et al. which is required to assure stability of adaptive control system despite the model-plant mismatch. A simple method to compensate the tracking error due to the use of pseudo-plant is considered.

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Robust Speech Recognition Using Real-Time Higher Order Statistics Normalization (고차통계 정규화를 이용한 강인한 음성인식)

  • Jeong, Ju-Hyun;Song, Hwa-Jeon;Kim, Hyung-Soon
    • MALSORI
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    • no.54
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    • pp.63-72
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    • 2005
  • The performance of speech recognition system is degraded by the mismatch between training and test environments. Many studies have been presented to compensate for noise components in the cepstral domain. Recently, higher order cepstral moment normalization method has been introduced to improve recognition accuracy. In this paper, we present real-time high order moment normalization method with post-processing smoothing filter to reduce the parameter estimation error in higher order moment computation. In experiments using Aurora2 database, we obtained error rate reduction of 44.7% with proposed algorithm in comparison with baseline system.

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Simplified Rotor and Stator Resistance Estimation Method Based on Direct Rotor Flux Identification

  • Wang, Mingyu;Wang, Dafang;Dong, Guanglin;Wei, Hui;Liang, Xiu;Xu, Zexu
    • Journal of Power Electronics
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    • v.19 no.3
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    • pp.751-760
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    • 2019
  • Since parameter mismatch seriously impacts the efficiency and stability of induction motor drives, it is important to accurately estimate the rotor and stator resistance. This paper introduces a method to directly calculate the rotor flux that is independent of stator and rotor resistance and electrical angle. It is based on obtaining the rotor and stator resistance using the model reference adaptive system (MRAS) method. The method has a lower computation burden and less adaptation time when compared with other rotor resistance estimation methods. This paper builds three coordinate frames to analyze the rotor flux error and rotor resistance error. A number of implementation issues are also considered.

Study on Precise Positioning using Hybrid Track Circuit system in Metro (하이브리드 궤도회로를 이용한 지하철 정위치정차에 대한 연구)

  • Jung, Ho-Hung;Ko, Yang-Og;Li, Chang-Long;Lee, Key-Seo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.3
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    • pp.471-477
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    • 2013
  • We have studied on the possibility of precise positioning using hybrid Track Circuit system. Hybrid Track Circuit uses RFID which replaces UHF. Hybrid Track Circuit is a part of next generation railroad signal system which is available to communicate with a railway on board system based on a realtime operating system. If applicate on a current hand operating subway, phenomenon caused by driver's mistake such as passing a stop without stopping or mismatch error between PSD and train door should be prevented.

Performance Improvement of a PMSM Sensorless Control Algorithm Using a Stator Resistance Error Compensator in the Low Speed Region

  • Park, Nung-Seo;Jang, Min-Ho;Lee, Jee-Sang;Hong, Keum-Shik;Kim, Jang-Mok
    • Journal of Power Electronics
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    • v.10 no.5
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    • pp.485-490
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    • 2010
  • Sensorless control methods are generally used in motor control for home-appliances because of the material cost and manufactureing standard restrictions. The current model-based control algorithm is mainly used for PMSM sensorless control in the home-appliance industry. In this control method, the rotor position is estimated by using the d-axis and q-axis current errors between the real system and a motor model of the position estimator. As a result, the accuracy of the motor model parameters are critical in this control method. A mismatch of the PMSM parameters affects the speed and torque in low speed, steadystate responses. Rotor position errors are mainly caused by a mismatch of the stator resistance. In this paper, a stator resistance compensation algorithm is proposed to improve sensorless control performance. This algorithm is easy to implement and does not require a modification of the motor model or any special interruptions of the controller. The effectiveness of the proposed algorithm is verified through experimental results.

The study for Compliance Mismatch in the End-to-End Anastomosis of Coronary Artery and PTFE (관상동맥과 PTFE의 End-To-End 문합에서 컴플라이언스 부적합에 관한 연구)

  • Shim,, Jae-Joon;Han, Geun-Jo;Ahn, Sung-Chan
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.27 no.1
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    • pp.34-41
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    • 2003
  • Finite element analysis of end-to-end artery/PTFE anastomosis recently have been researched. But, these studies were carried out without the compensation for the error of finite element analysis and assumed the artery and PTFE as the simple cylindrical shape in spite of being the fatty tissue which covers the heart. Therefore, we performed the convergency study with respect to increasing the element numbers and considered the fatty tissue as the elastic foundation in the finite element analysis. The results are as fallow : 1. An anastomosis with the thinner thickness and larger diameter PTFE than artery could reduce the compliance disagreement. 2. A fatty tissue was affected to reduce the compliance mismatch in the vicinity of anastomosis of different material. Therefore a hypercompliant zone become narrorw and a compliance discrepancy decrease between the artery and the PTFE about 70%. And radial displacement with respect to longitudinal direction of an artery and the PTFE anastomosis was similar to a sectional compliance.

Analysis of Power Variation and Design Optimization of a-Si PV Modules Considering Shading Effect (음영효과를 고려한 a-Si PV모듈의 출력 변화 및 최적 설계조건에 관한 연구)

  • Shin, Jun-Oh;Jung, Tae-Hee;Kim, Tae-Bum;Kang, Ki-Hwan;Ahn, Hyung-Keun;Han, Deuk-Young
    • Journal of the Korean Solar Energy Society
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    • v.30 no.6
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    • pp.102-107
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    • 2010
  • a-Si solar cell has relatively dominant drift current when compared with crystalline solar cell due to the high internal electric field. Such drift current make an impact on the PV module in the local shading. In this paper, the a-Si PV module output characteristics of shading effects was approached in terms of process condition, because of the different deposition layer of thin film lead to rising the resistance. We suggested design condition to ensure the long-term durability of the module with regard to the degradation factors such as hot spot by analyzing the module specification. The result shows a remarkable difference on module uniformity for each shading position. In addition, the unbalanced power loss due to power mismatch of each module could intensify the degradation.

Performance Analysis of SMMA Adaptive Blind Equalization Algorithm with A Flag (Flag를 가지는 SMMA 적응 블라인드 등화 알고리즘의 성능 분석)

  • Jeong, Young-Hwa
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.14 no.4
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    • pp.71-76
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    • 2014
  • In this paper, we propose a SMMA(Sliced-Multi Modulus Algorithm) adaptive blind equalization algorithm with Flag for high order QAM system. SMMA has improved characteristics by applying the multi contour to MMA. However, SMMA still has a limit that the mismatch problem causes the residual error in the steady state is large. In order to significantly reduce the residual error in the steady state, we propose SMMA, which is controlled by the binary Flag of '1 'or '0' obtained from SMMA and a decision-directed algorithm, and analyze the performance of the proposed algorithm. By computer simulation, it is confirmed that the proposed algorithm has improved performance highly in terms of a residual ISI and a residual error in the steady state compared with MMA and SMMA.

A 15b 50MS/s CMOS Pipeline A/D Converter Based on Digital Code-Error Calibration (디지털 코드 오차 보정 기법을 사용한 15비트 50MS/s CMOS 파이프라인 A/D 변환기)

  • Yoo, Pil-Seon;Lee, Kyung-Hoon;Yoon, Kun-Yong;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.5
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    • pp.1-11
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    • 2008
  • This work proposes a 15b 50MS/s CMOS pipeline ADC based on digital code-error calibration. The proposed ADC adopts a four-stage pipeline architecture to minimize power consumption and die area and employs a digital calibration technique in the front-end stage MDAC without any modification of critical analog circuits. The front-end MDAC code errors due to device mismatch are measured by un-calibrated back-end three stages and stored in memory. During normal conversion, the stored code errors are recalled for code-error calibration in the digital domain. The signal insensitive 3-D fully symmetric layout technique in three MDACs is employed to achieve a high matching accuracy and to measure the mismatch error of the front-end stage more exactly. The prototype ADC in a 0.18um CMOS process demonstrates a measured DNL and INL within 0.78LSB and 3.28LSB. The ADC, with an active die area of $4.2mm^2$, shows a maximum SNDR and SFDR of 67.2dB and 79.5dB, respectively, and a power consumption of 225mW at 2.5V and 50MS/s.