• Title/Summary/Keyword: Metal oxide semiconductor

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C-V Characteristics of The MOS Devices by Using different Gate Metals (게이트 금속 변화에 의한 MOS 소자의 C-V 특성)

  • 최현식;서용진;유석빈;장의구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1988.10a
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    • pp.95-97
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    • 1988
  • The instability of MOS devices is mainly caused by the oxide charges, and as the need to develop the gate metal grows researches for various new metal gate have been performed, and in these researches, the difference work function existing between the metal and the semiconductor should be considered. Here int his paper, the device is made by the sputtering and the LPCVD method using pure Al, compound metal. poly-si, as a gate metal, the result of the research was shown that the work function difference from using different gate metals effects on the flatband voltage shift. This means we can infer that the threshold voltage adjustment is possible by using different gate metals and this whole mechanism makes the devices behavior more stable.

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DC Characteristics of n-MOSFET with $Si_{0.88}Ge_{0.12}$ Heterostructure Channels ($Si_{0.88}Ge_{0.12}$ 이종접합 구조의 채널을 이용한 n-MOSFET의 DC 특성)

  • Choi, Sang-Sik;Yang, Hyun-Duk;Han, Tae-Hyun;Cho, Deok-Ho;Lee, Nae-Eung;Shim, Kyu-Hwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.150-151
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    • 2006
  • $Si_{0.88}Ge_{0.12}$/Si heterostructure channels grown by RPCVD were employed to n-type metal oxide semiconductor field effect transistors(MOSFETs), and their electrical properties were investigated. SiGe nMOSFETs presented very high transconductance compared to conventional Si-bulk MOSFETs, regardless substantial drawbacks remaining in subthreshold-slope, $I_{off}$, and leakage current level. It looks worthwhile to utilize excellent transconductance properties into rf applications requesting high speed and amplification capability, although optimization works on both device structure and unit processes are necessary for enhanced isolation and reduced power dissipation.

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Characteristics of Silicon Rich Oxide by PECVD (PECVD에 의한 Sirich 산화막의 특성)

  • Gang, Seon-Hwa;Lee, Sang-Gyu;Park, Hong-Rak;Go, Cheol-Gi;Choe, Su-Han
    • Korean Journal of Materials Research
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    • v.3 no.5
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    • pp.459-465
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    • 1993
  • By making the inter-metal PECVD $SiO_2$ as a Si rich oxide under the SOG, the hydrogen and water related diffusants could be captured a t SI dangling bonds. This gettering process was known to prevent the device characteristics degradations related to the H, $H_20$. The basic characteristics of Si rich oxide have been studied according to changing high/low frequency power and $SiH_4/N_2O$ gas flow ratio in PECVD. As increase in low frequency power, deposition rate decreased but K.I. and compressive stress increased. Decrease of the water peaks of FTIR spectra at the wave number range of 3300~3800$\textrm{cm}^{-1}$' also indicated that intensty the films were densified. As increase in SiH, gas flow rate, deposition rate, R.I. and etch rate increased while compressive stress decreased. F'TIK spectra showed that peak intensity corresponding to Si-0-Si stretching vibration decreased and shifted to the lower wave numbers. But AES showed that Si dangl~ng bonds were increased as a result of lower Si:O(l: 1.23) ratlo inthe Si rich oxide as compared to Si : O(1 : 1.98) ratio of usual oxide.

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Output Characteristics of Carbon-nanotube Field-effect Transistor Dependent on Nanotube Diameter and Oxide Thickness (나노튜브 직경과 산화막 두께에 따른 탄소나노튜브 전계 효과 트랜지스터의 출력 특성)

  • Park, Jong-Myeon;Hong, Shin-Nam
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.2
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    • pp.87-91
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    • 2013
  • Carbon-nanotube field-effect transistors (CNFETs) have drawn wide attention as one of the potential substitutes for metal-oxide-semiconductor field-effect transistors (MOSFETs) in the sub-10-nm era. Output characteristics of coaxially gated CNFETs were simulated using FETToy simulator to reveal the dependence of drain current on the nanotube diameter and gate oxide thickness. Nanotube diameter and gate oxide thickness employed in the simulation were 1.5, 3, and 6 nm. Simulation results show that drain current becomes large as the diameter of nanotube increases or insulator thickness decreases, and nanotube diameter affects the drain current more than the insulator thickness. An equation relating drain saturation current with nanotube diameter and insulator thickness is also proposed.

Growth and Properties of p-type Transparent Oxide Semiconductors

  • Heo, Young-Woo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.99-99
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    • 2014
  • Transparent oxide semiconductors (TOSs) are. currently attracting attention for application to transparent electrodes in optoelectronic devices and active channel layers in thin-film transistors. One of the key issues for the realization of next generation transparent electronic devices such as transparent complementary metal-oxide-semiconductor thin-film transistors (CMOS TFTs), transparent wall light, sensors, and transparent solar cell is to develop p-type TOSs. In this talks, I will introduce issues and status related to p-type TOSs such as LnCuOQ (Ln=lanthanide, Q=S, Se), $SrCu_2O_2$, $CuMO_2$ (M=Al, Ga, Cr, In), ZnO, $Cu_2O$ and SnO. The growth and properties of SnO and Cu-based oxides and their application to electronic devices will be discussed.

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Fabrication and Properties of Aluminum oxide/6H-SiC Structures using Sputtering Method (스퍼터링법을 이용한 산화알루미늄/6H-SiC 구조의 제작 및 특성)

  • Jung, Soon-Won;Choi, Haeng-Chul;Kim, Jae-Hyun;Jeong, Sang-Hyun;Kim, Kwang-Ho;Koo, Kyung-Wan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.06a
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    • pp.194-195
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    • 2006
  • Aluminum oxide films directly grown on n-type 6H-SiC(0001) substrates were fabricated by RF magnetron sputtering system. Metal-insulator-semiconductor(MIS) C-V properties with aluminum oxide thin films showed hysteresis and f1at band voltage shift. The dielectric constant of the film calculated from the capacitance at the accumulation region was about 5. Typical gate leakage current density of film at room temperature was the order of $10^{-9}\;A/cm^2$ at the range of within 2MV/cm. The breakdown did not occur at the film within the measurement range.

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Temperature sensor without reference resistor by indium tin oxide and molybdenum (인듐틴옥사이드와 몰리브데늄을 이용한 외부 기준 저항이 필요 없는 온도센서)

  • Jeon, Ho-Sik;Bae, Byung-Seong
    • Journal of Sensor Science and Technology
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    • v.19 no.6
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    • pp.483-489
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    • 2010
  • Display quality depends on panel temperatures. To compensate it, temperature sensor was integrated on the panel. The conventional temperature sensor integrated on the panel needs external reference resistor. Since the resistance of external resistor can vary according to the variation of the environment temperature, the conventional temperature sensor can make error in temperature sensing. The environmental temperatures can change by the back light unit, driving circuits or chips. In this paper, we proposed a integrated temperature sensor on display panel which does not need external reference resister. Instead of external reference resistor, we used two materials which have different temperature coefficient in resistivity. They are connected serially and the output voltage was measured at the point of connection with the applied voltage to both ends. The proposed sensor was fabricated with indium tin oxide(ITO), and Mo metal electrode temperature sensor which were connected serially. We verified the temperature senor by the measurements of sensitivity, lineality, hysteresis, repeatability, stability, and accuracy.

Electric Characteristics of $V_2O_5-P_2O_5$ Glass Semiconductor ($V_2O_5-P_2O_5$계 유리반도체의 전기적 특성)

  • 이강호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.8 no.1
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    • pp.12-16
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    • 1983
  • This paper is dealing a $V_3O_5-P_2O_5$ metal oxide glass semiconductor. This semiconductor is easy to fabricate in the atmospheric condition at relatively low temperature. The element is made like a bead, and platinum segments are used as electrodes. Other kind of metal withstanding high temperature near 1000C can also be used as electrode. Experiment verifies that the fabricated element has the resistance in the order of about ~$10^5\;\Omega$, and shows negative resistance characteristics and switching characteristics with respect to temperature. An equivalent circuit of the element is proposed based on its electrical characteristcs.

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Microwave와 Solution ZrO2를 이용한 Metal-Oxide-Semiconductor-Capacitor 제작

  • Lee, Seong-Yeong;Kim, Seung-Tae;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.206.1-206.1
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    • 2015
  • 최근에 금속산화물을 증착하는 방법으로 용액공정이 주목 받고 있다. 용액 공정은 대기압에서 매우 간단한 방법으로 복잡한 공정과정을 요구하지 않기 때문에 박막을 경제적으로 간단하게 형성할 수 있다. 하지만 용액공정을 통해 형성한 박막에는 소자의 특성을 열화 시키는 solvent와 탄소계열의 불순물을 많이 포함하고 있어 고온의 열처리가 필수적이다. 박막의 품질을 향상시키기 위해서 다양한 열처리 방법들이 이용되고 있으며, 일반적인 열처리 방법으로는 furnace를 이용한 conventional thermal annealing (CTA)이 많이 이용되고 있다. 하지만, 최근에는 microwave를 이용한 공정이 주목 받고 있다. Microwave energy는 CTA보다 효과적으로 비교적 낮은 온도에서 높은 열처리 효과를 나타낸다. 본 실험은 n-type Silicon 기판에 solution-ZrO2 산화막을 형성 후, oven baking을 한 뒤, CTA와 microwave를 이용하여 solvent와 불순물을 제거 하였다. 전기적 특성을 확인하기 위해 solution ZrO2 산화막 위에 E-beam evaporator를 이용해 Ti 금속 전극을 증착하여 Metal-Oxide-Semiconductor (MOS) capacitor를 제작하였다. 다음으로, PRECISION SEMICONDUCTOR PARAMETER ANALYZER (4156B)를 이용하여, capacitance-voltage (C-V) 특성 및 current-voltage (I-V) 특성을 비교하였다. 다음으로, CTA를 통하여 제작한 소자와 전기적 특성을 비교하였다. 그 결과, Microwave irradiation으로 열처리한 MOS capacitor 소자에서 capacitance 값과 flat band voltage, hysteresis 등이 개선되는 효과를 확인하였다. Microwave irradiation 열처리는 100oC 미만의 온도에서 공정이 이루어짐에도 불구하고 시료 내에서의 microwave 에너지의 흡수가 CTA 공정에서의 열에너지 흡수보다 훨씬 효율적으로 이루어지며, 결과적으로 ZrO2 용액의 불순물과 solvent를 낮은 온도에서 제거하여 고품질 박막 형성에 매우 효과적이라는 것을 나타낸다. 따라서, microwave irradiation 열처리 방법은 비정질 산화막이 포함되는 박막 transistor 소자 제작에 대하여 결정적인 열처리 방법이 될 것으로 기대한다.

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Characterization and Comparison of Doping Concentration in Field Ring Area for Commercial Vertical MOSFET on 8" Si Wafer (8인치 Si Power MOSFET Field Ring 영역의 도핑농도 변화에 따른 전기적 특성 비교에 관한 연구)

  • Kim, Gwon Je;Kang, Ye Hwan;Kwon, Young-Soo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.26 no.4
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    • pp.271-274
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    • 2013
  • Power Metal Oxide Semiconductor Field Effect Transistor's (MOSFETs) are well known for superior switching speed, and they require very little gate drive power because of the insulated gate. In these respects, power MOSFETs approach the characteristics of an "ideal switch". The main drawback is on-resistance RDS(on) and its strong positive temperature coefficient. While this process has been driven by market place competition with operating parameters determined by products, manufacturing technology innovations that have not necessarily followed such a consistent path have enabled it. This treatise briefly examines metal oxide semiconductor (MOS) device characteristics and elucidates important future issues which semiconductor technologists face as they attempt to continue the rate of progress to the identified terminus of the technology shrink path in about 2020. We could find at the electrical property as variation p base dose. Ultimately, its ON state voltage drop was enhanced also shrink chip size. To obtain an optimized parameter and design, we have simulated over 500 V Field ring using 8 Field rings. Field ring width was $3{\mu}m$ and P base dose was $1e15cm^2$. Also the numerical multiple $2.52cm^2$ was obtained which indicates the doping limit of the original device. We have simulated diffusion condition was split from $1,150^{\circ}C$ to $1,200^{\circ}C$. And then $1,150^{\circ}C$ diffusion time was best condition for break down voltage.