• 제목/요약/키워드: Metal mirror

검색결과 87건 처리시간 0.028초

미세홈 가공시 전해 인프로세스 드레싱의 영향에 관한 연구 (A Study on the Effect of Electrolytic In-process Dressing in Slot Grinding)

  • 유정봉;이석우;정해도;최헌종
    • 한국정밀공학회지
    • /
    • 제16권1호통권94호
    • /
    • pp.18-25
    • /
    • 1999
  • Chipping is an unavoidable phenomenon in the slot grinding process of hard and brittle materials. However, it should be reduced for the improvement of surface integrity in the manufacture of optical and semiconductor components. Electrolytic In-process Dressing (ELID) technique for metal bonded superabrasive grinding wheel has been developed for mirror surface grinding of hard and brittle materials. Electrically dressed wheel surface has sharply exposed abrasives and results in lower grinding force, higher grinding efficiency in grinding. The paper deals with a newly developed method for slot grinding using ELID and was implemented to improve grooved surface quality and decreases chipping size on the edge of the groove. As a result, we accomplished chipping-free grooves and obtained the clear ground surfaces on glass and WC.

  • PDF

Slot Grinding시 전해 인프로세스 드레싱의 영향에 관한 연구 (Effect of Electrolytic In-process Dressing in Slot Grinding)

  • 유정봉;정해도;최헌종
    • 한국정밀공학회:학술대회논문집
    • /
    • 한국정밀공학회 1995년도 추계학술대회 논문집
    • /
    • pp.48-52
    • /
    • 1995
  • Chipping is an unavidable phenomean in the slot grinding process of hard and brittle materials. However,it should be reduced for the improvement of surface integrity in the manufacture of optical and semiconductor components. Electrolytic In-process Dressing (ELID) technique for metal bonded superabrasive grinding wheel has been developed for mirror surface grinding of hard and brittle materials. Electrically dressed wheel surface has sharply exposed abrasives and results in lower grinding force, higher grinding efficiency in grinding. The paper deals with a newly developed method for slot grinding using ELID and was implemented to improve grooved surface quality and decreases chipping size on the edge of the groove. As a result, we accomplished shipping-free grooves and obtained the clear ground sufaces on glass and tungsten carbide.

  • PDF

12%-Cr 강의 C0$_{2}$레이저 표면 경화

  • 김재도
    • 한국정밀공학회:학술대회논문집
    • /
    • 한국정밀공학회 1992년도 춘계학술대회 논문집
    • /
    • pp.84-88
    • /
    • 1992
  • Laser beam hardenling of 12%-Cr steel has been evaluated by using a continuous wave 3 kW CO$\_$2/ laser with a hardening mirror set. Experiment was performed on the optimum hardening condition with a laser power of 2.85kW and travel speed of 10 and 5 m/min. Multi passes have been alsotried to find the hardening characteristics of partly overlapped zone. The black paint to use at high temperature was adopted to increases the absorptivity of laser beam energy with the wavelength of 10.6 .mu. m at the surface of bese metal. The microstructure of the hardened layers was observed by using a light microscopy. SEM and TEM. A fine lamellar martensite formed in the hardened zones exhibits very high Vickers microhardness of 600 Hv, whereas the tempered martesite distributes in the base metal with Vickers microhardness of 240 Hv. It has been found that laser hardening with multi pass showed no significant drop of the hardness between adjacent passes.

주파수 적응성을 갖는 부지연 회로의 설계기법 (Design Methodology of the Frequency-Adaptive Negative-Delay Circuit)

  • 김대정
    • 전자공학회논문지SC
    • /
    • 제37권3호
    • /
    • pp.44-54
    • /
    • 2000
  • 본 논문에서는 표준 메모리 공정에 구현 가능한 주파수 적응성을 갖는 부지연 회로의 설계기법에 대해 제안한다. 제안하는 설계기법은 기본적으로 아날로그 SMD (synchronous mirror delay) 형태의 부지연 회로로서 입력클록의 주기와 구현하고자 하는 부의 지연 시간의 차이에 해당하는 시간을 아날로그 회로의 개념으로 측정하고 다음 번 주기에서 반복한다. 출력클록의 발생과 관련되는 부수적인 지연을 측정단의 앞 단인 지연모델 단에서 상쇄하는 기존의 SMB 기법과는 달리, 반복단에서 상쇄하는 새로운 기법을 통하여 넓은 부지연 범위를 구현하여 특히 고속동작에서의 부지연 특성을 원할하게 한다. 또한 넓은 범위의 주파수 동작범위를 구현하기 위해 해당하는 주파수 범위에서 아날로그 회로가 최적의 동작 조건을 갖추도록 하기 위한 새로운 주파수 감지기 및 최적조건 설정기법을 제안한다. 제안된 회로의 응용으로서 초고속 DRAM인 DDR SDRAM에 적용하는 예를 보였으며, 0.6㎛ n-well double-poly double-metal CMOS 공정을 사용하여 모의실험 함으로써 그 유용성을 입증한다.

  • PDF

면적을 감소시킨 중첩된 싱크러너스 미러 지연 소자를 이용한 저전력 클럭 발생기 (Low Power Clock Generator Based on An Area-Reduced Interleaved Synchronous Mirror Delay Scheme)

  • 성기혁;박형준;양병도;김이섭
    • 대한전자공학회논문지SD
    • /
    • 제39권8호
    • /
    • pp.46-51
    • /
    • 2002
  • 회로의 크기와 소모 전력을 줄이기 위하여 새로운 구조의 중첩된 싱크러너스 미러 지연 소자를 제안한다. 기존의 중첩된 싱크러너스 미러 지연 소자는 지터를 줄이기 위하여 여러 쌍의 포워드 지연 배열과 백워드 지연 배열을 사용하였다. 제안하는 중첩된 싱크러너스 미러 지연 소자는 멀티플렉서의 위치를 변경시킴으로써 오직 단 하나의 포워드 지연 배열과 백워드 지연 배열을 필요로 한다. 뿐만 아니라, 제안하는 중첩된 싱크러너스 미러 지연 소자는 인버터를 추가함으로써 기존 회로의 극성 문제를 해결하였다. 모의 실험 결과로 부터 제안하는 중첩된 싱크러너스 미러 지연 소자는 약 30%의 전력 소모 감소와 약 40%의 면적 감소 효과를 가져온다는 것을 알 수 있다. 모든 모의 실험과 구현은 0.25um two-metal CMOS 공정기술을 사용하여 행해졌다.

광선추적을 사용한 나사산 표면결함 검사용 환형 광학계 개발 (Development of Annular Optics for the Inspection of Surface Defects on Screw Threads Using Ray Tracing Simulation)

  • 이지원;임영은;박근;나승우
    • 한국정밀공학회지
    • /
    • 제33권6호
    • /
    • pp.491-497
    • /
    • 2016
  • This study aims to develop a vision inspection system for screw threads. To inspect external defects in screw threads, the vision inspection system was developed using front light illumination from which bright images can be obtained. The front light system, however, requires multiple side images for inspection of the entire thread surface, which can be performed by omnidirectional optics. In this study, an omnidirectional optical system was designed to obtain annular images of screw threads using an image sensor and two reflection mirrors; one large concave mirror and one small convex mirror. Optical simulations using backward and forward ray tracing were performed to determine the dimensional parameters of the proposed optical system, so that an annular image of the screw threads could be obtained with high quality and resolution. Microscale surface defects on the screw threads could be successfully detected using the developed annular inspection system.

부스터 변환기를 위한 MOSFET 스위치 전류 감지 회로 (Current Sensing Circuit of MOSFET Switch for Boost Converter)

  • 민준식;노보미;김의진;이찬수;김영석
    • 한국전기전자재료학회논문지
    • /
    • 제23권9호
    • /
    • pp.667-670
    • /
    • 2010
  • In this paper, a high voltage current sensing circuit for boost converter is designed and verified by Cadence SPECTRE simulations. The current mirror pair, power and sensing metal-oxide semiconductor field effect transistors (MOSFETs) with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side lateral-diffused MOS transistor (LDMOST) switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35 ${\mu}m$ BCD process show that current sensing is accurate and the pulse frequency modulation (PFM) boost converter using the proposed current sensing circuit satisfies with the specifications.

우주용 접착제의 중첩 전단 강도 시험 (Lap Shear Strength Test of Space Adhesives)

  • 서유덕;박상훈;윤성기;이상률;이덕규;장홍술;이승훈;김현중;김지연;엄태경;이응식;정대준
    • 한국항공우주학회지
    • /
    • 제34권10호
    • /
    • pp.40-47
    • /
    • 2006
  • 반사경 지지부의 접착 특성은 인공위성카메라 반사경의 광학적 성능에 지대한 영향을 미치므로 이에 대한 연구가 필수적이다. 이를 위해 본 연구에서는 세 종류의 우주용 접착제의 접착 특성에 관한 연구를 수행하였다. 반사경의 재료인 제로더(Zerodur)와 금속이 접착된 시편을 사용하여 중첩 전단(lap shear) 시험을 수행하였고 금속과 금속이 접착된 시편에 대해서도 시험을 수행하였다. 또한 다양한 온도 환경을 겪더라도 안정적인 접착력이 보장되는지의 여부를 확인하였으며 세 접착제의 접착력을 비교하였다.

Modified Suppression Subtractive Hybridization Identifies an AP2-containing Protein Involved in Metal Responses in Physcomitrella patens

  • Cho, Sung Hyun;Hoang, Quoc Truong;Phee, Jeong Won;Kim, Yun Young;Shin, Hyun Young;Shin, Jeong Sheop
    • Molecules and Cells
    • /
    • 제23권1호
    • /
    • pp.100-107
    • /
    • 2007
  • The moss Physcomitrella patens has two life cycles, filamentous protonema and leafy gametophore. A modified from of suppression subtractive hybridization (SSH), mirror orientation selection (MOS), was applied to screen genes differentially expressed in the P. patens protonema. Using reverse Northern blot analysis, differentially expressed clones were identified. The identified genes were involved mainly in metal binding and detoxification. One of these genes was an AP2 (APETALA2) domain-containing protein (PpACP1), which was highly up-regulated in the protonema. Alignment with other AP2/EREBPs (Ethylene Responsive Element Binding Proteins) revealed significant sequence homology of the deduced amino acid sequence in the AP2/EREBP DNA binding domain. Northern analysis under various stress conditions showed that PpACP1 was induced by ethephon, cadmium, copper, ABA, IAA, and cold. In addition, it was highly expressed in suspension-cultured protonema. We suggest that PpACP1 is involved in responses to metals, and that suspension culture enhance the expression of genes responding to metals.

금속결합제 연삭 숫돌의 ELID 전해속도 자동 조절장치 개발 (Development of Auto-Control Power Supply of ELID Electrolysis Speed for Metal-Bonded Grinding Wheel)

  • 신건휘;곽태수
    • 한국정밀공학회지
    • /
    • 제33권11호
    • /
    • pp.899-904
    • /
    • 2016
  • ELID grinding is an excellent technique for the mirror grinding of the variety of the advanced metallic or nonmetallic materials. The focus of this study is the development of an automatic-control electrolysis-speed device for the automation of the ELID-grinding process. For the development of the automatic-control electrolysis-speed device, analysis experiments regarding the ELID cycle and oxide-layer removal and creation were conducted according to a truing and dressing process. Also, a comparative experiment was conducted to confirm the variance of the electrolysis speed in accordance with changes of the voltage. The experiment results for the developed automatic-control electrolysis-speed device show that the developed device could control the electrolysis speed according to voltage changes through the use of the data that are monitored during the ELID-grinding process.