• Proceedings of the Korea Contents Association Conference
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• 2009.05a
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• pp.51-56
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• 2009

Flash memory has rapidly deployed as data storage. However, the flash memory has a major disadvantage that recorded data cannot be dynamically overwritten. In order to solve this "erase-before-write" problem, the log block buffer scheme used Flash memory file system. however, the current managements of the log buffer, in case random write pattern, BAST technique have problem of frequent merge operation, but FAST technique don't consider merge operation by frequently updated data. Previous methods not consider merge operation cost and frequently updated data. In this paper, we propose a new log buffer management scheme, called JBB. Our proposed method evaluates the worth of the merge of log blocks, so we conducts the merge operation between infrequently updated data and its data blocks, and postpone the merge operation between frequently updated data and its data blocks. Through the method, we prevent the unnecessary merge operations, reduce the number of the erase operation, and improve the utilization of the flash memory storage. We show the superiority of our proposed method through the performance evaluation with BAST and FAST.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.8B
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• pp.757-763
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• 2006

In this paper, a novel multiple access scheme using SMA(Split and Merge Algorithm) is proposed to reduce the accessdelay of wireless MAC protocols. The key idea of the SMA is to dynamically split and merge the contending terminals depending on their traffic loads for effective control of access to the channels. The SMA divides the collided terminals into several sub-groups if a collision occurs and merges the idle terminals of the split sub-groups into their original group. The merge algorithm can be used to resolve collision and split operation can be used to dynamic group management. The simulation results indicate that our algorithm may provide a higher throughput and a lower collision rate than the existing algorithms, especially under heavy traffic loads.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.6
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• pp.413-424
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• 2017

In this paper, we show shortcomings of separate chaining scheme by way of experiments with NAND flash memory and improve the performance with merge chaining scheme which is proposed in this paper. We explain this merge chaining scheme and explain how to improve the performance of search operation. Merge chaining scheme shows better performance at insert and search operation compare to separate chaining scheme.

• Korean Journal of English Language and Linguistics
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• v.4 no.1
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• pp.103-116
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• 2004

Chomsky (2001) and Kitahara's (2002) suggestion that object shift occurs prior to movement of the νP-subject to SPEC-T is not on the right track with respect to the Merge operation. According to the Merge operation, TP is necessarily created earlier than CP. Chomsky (2001) suggests that the probe-goal relation between T and SUBJ is evaluated in the CP after it is known whether the position of as has become a trace losing its phonological content. However, the FocP is not a phase (CP). So, Chomsky (2001) and Kitahara's (2002) suggestion is not correct in the case of the movement of OBJ to the spec of Foc in English, either. The aim of this paper is to show that the νP-subject must move to SPEC- T prior to the consecutive movement of the wh-object to SPEC-C via object shift in English. This derivation obeys Chomsky's (2001) so-called probe-goal matching condition.

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.7
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• pp.508-519
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• 2007

Flash memory based storage has been used in various mobile systems and now is to be used in Laptop computers in the name of Solid State Disk. The Flash memory has not only merits in terms of weight, shock resistance, and power consumption but also limitations like erase-before-write property. To overcome these limitations, Flash memory based storage requires special address mapping software called FTL(Flash-memory Translation Layer), which often performs merge operation for block recycling. In order to reduce block recycling cost in NAND Flash memory based storage, we introduce another block recycling scheme which we call migration. As a result, the FTL can select either merge or migration depending on their costs for each block recycling. Experimental results with Postmark benchmark and embedded system workload show that this cost-based selection of migration/merge operation improves the performance of Flash memory based storage. Also, we present a solution of macroscopic optimal migration/merge sequence that minimizes a block recycling cost for each migration/merge combination period. Experimental results show that the performance of Flash memory based storage can be more improved by the macroscopic optimization than the simple cost-based selection.

• Journal of Institute of Control, Robotics and Systems
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• v.8 no.12
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• pp.1014-1022
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• 2002

An objective of Automated Highway Systems (AHS) is to increase the safety and throughput of the existing highway infrastructure by introducing traffic automation. AHS is an example of a large scale, multiagent complex dynamical system and is ideally suited for a hierarchical hybrid controller. We discuss a design issue of efficient hybrid controllers for the platoon maneuvers on AHS. For the modeling of a hybrid system including the merge and split operations, a safety distance policy is introduced for the merge and split operations. After that, the platoon system will be modeled by a hybrid system In addition, a hybrid controller for the proposed merge and split operation models is presented. Finally, the performance of the proposed hybrid control scheme is demonstrated via scenarios for platoon maneuvers.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2003.09a
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• pp.392-394
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• 2003

There is a well-known simple, stable standard merge algorithm, which uses only linear time but for the price of double space. This extra space consumption has been often remarked as lack of the standard merge sort algorithm that covers a merge process as central operation. In-place merging is a way to overcome this lack and so is a topic with a long tradition of inspection in the area of theoretical computer science. We present an in-place merging algorithm that rear-ranges the elements to be merged by rotation, a special form of block interchanging. Our algorithm is novel, due to its technique of determination of the rotation-areas. Further it has a short and transparent definition. We will give a presentation of our algorithm and prove that it needs in the worst case not more than twice as much comparisons as the standard merge algorithm. Experimental work has shown that our algorithm is efficient and so might be of high practical interest.

• Database Research
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• v.34 no.3
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• pp.28-44
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• 2018

In a database system, the most expensive operation among relational operations is a join operation. Generally, CPU-based join operations uses parallel processing with either 1 core or 16 cores at most, which does not significantly improve the function. On the other hand, GPGPU(General-Purpose computing on Graphics Processing Units) allows parallel processing through thousands of processing units, greatly reducing the time required to perform join operations. Parallelization of the operation using GPGPU uses NVIDIA's CUDA SDK. In this paper, we implement parallelization of the join operation using GPGPU and compare the performances. The used join operations are Nested Loop Join (NLJ), Sort Merge Join (SMJ) and Hash Join (HJ), and GPGPU equipment uses TITAN Xp, GTX 1080 Ti and GTX 1080. We measure and compare the performance of join operations based on CPU and GPGPU. We compare this performance with the performance of the previous study on the join operation based on GPGPU. The results of experiment show that the performance based on GPGPU is 6~328 times faster than the one based on CPU.

• Journal of Broadcast Engineering
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• v.18 no.5
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• pp.691-701
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• 2013

In this paper, an early termination algorithm for merge process is proposed to reduce the computational complexity in High Efficiency Video Coding (HEVC) encoder. In the HEVC, the same candidate modes from merge candidate list (MCL) are shared to predict a merge or merge SKIP mode. This search process is performed by the number of the obtained candidates for the both of the merge and SKIP modes. This may cause some redundant search operations. To reduce this redundant search operation, we employ the neighboring blocks which have been encoded in prior, to check on the contextual information. In this study, the spatial, temporal and depth neighboring blocks have been considered to compute a correlation information. With this correlation information, an early termination algorithm for merge process is suggested. When all modes of neighboring blocks are SKIP modes, then the merge process performs only SKIP mode. Otherwise, usual merge process of HEVC is performed Through experimental results, the proposed method achieves a time-saving factor of about 21.25% on average with small loss of BD-rate, when comparing to the original HM 10.0 encoder.

• Korean Journal of Computational Design and Engineering
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• v.1 no.1
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• pp.20-32
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• 1996

The boundary evaluation technique for Boolean operation on non-manifold models which is regarded as the most popular and powerful method to create and modify 3-D CAD models has been developed. This technique adopted the concept of Merge and Selection in which the CSG tree for Boolean operation can be edited quickly and easily. In this method, the merged set which contains complete information about primitive models involved is created by merging primitives one by one, then the alive entities are selected following the given CSG tree. This technique can support the hybrid representation of B-rep(Boundary Representation) and CSG(Constructive Solid Geometry) tree in a unified non-manifold model data structure, and expected to be used as a basic method for many modeling problems such as data representation of form features, and the interference between them, and data representation of conceptual models in design process, etc.