• The Journal of Korean Institute of Communications and Information Sciences
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• v.37B no.11
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• pp.1041-1049
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• 2012

The transactional memory was proposed to solve the problems of the conventional lock-based synchronization methods in the shared memory multiprocessor system. Various implementation methods for putting the high performance transactional memory to practical use have been continuously studied. However, these studies focus only on the commercialization and performance enhancement of the transactional memory. Besides, there have been few studies to analyze the system overhead of the transactional memory according to the conflict management policy. Thus this paper classifies hardware transactional memory, which is one kind of transactional memories, into four types according to the conflict management policy, and then compares and analyzes their performance and system bus traffic through their modeling and simulation. In addition, the most effective conflict management policy for the hardware transactional memory is presented through these comparison and analysis.

• International Journal of Advanced Culture Technology
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• v.10 no.2
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• pp.92-97
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• 2022

This study studied the seasons in the novel Snowy Read and the archetypal characteristics in natural phenomena. Summer and winter are the main seasons of Snowy Road. The cycle of the day is the time of dawn and early morning, evening, or night. It is summer now, and memory day is winter. In Snowy Road, 'I' is in sharp conflict with my mom during the summer season. This conflict is resolved and resurfaced with the feeling of 'love' as the story of the day is told in the mother's memory. It was a long time of conflict and trials for winter in the memory of me and my mother. As a result of examining the circular symbols in the Snowy Road, each symbol represents the 'I' and 'the mother's feelings'. 'I' and 'Mom's Emotions' collide, but they confirm each other's sincerity and rebuild their feelings of conflict with 'love'. In Snowy Road, the mother and son's 'love' shows that the mother's son is deeply in love, but the son's mother's love is also very deep.

• Journal of Distribution Research
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• v.17 no.3
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• pp.93-113
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• 2012

Early conflict research in channel and organization area have focused on the definition of conflict construct, its cause, consequence and identified conflict resolution management. Recent studies about conflict, however, have explored new assumption of complexity, a multidimensional conflict construct, contextual conflict management strategies, positive and negative conflict/consequence, and the conflict resolution strategy. Although many literatures exists on channel conflict resolution, little research has been done about relationship learning and performance from conflict resolution perspective. This study explores how channel members can achieve a relationship learning, as a conflict resolution mechanism, which enhance co-created value in marketing channel relationship. Therefore we propose that conflict resolution strategies(collaborating behavior and avoiding behavior) influence channel performance(effectiveness and efficiency) through relationship learning processes(learning via information exchange, joint interpretation and coordination, relationship-specific knowledge memory), in view of buyer-seller relationship. The research model is shown at

• The KIPS Transactions:PartA
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• v.18A no.1
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• pp.19-24
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• 2011

As era of multi-core processors has arrived, transactional memory has been considered as an effective method to achieve easy and fast multi-threaded programming. Various hardware transactional memory systems such as UTM, VTM, FastTM, LogTM, and LogTM-SE, have been introduced in order to implement high-performance multi-core processors. Especially, LogTM-SE has provided study performance with an efficient memory management policy and a practical thread scheduling method through conflict detection based on signatures. However, increasing number of cores on a processor imposes the hardware complexity for signature processing. This causes overall performance degradation due to the heavy workload on signature comparison. In this paper, we propose a new architecture of multiple signature comparison to improve conflict detection of signature based transactional memory systems.

• The Transactions of the Korea Information Processing Society
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• v.3 no.7
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• pp.1687-1696
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• 1996

Most of the main memory database systems use two-phase locking(2PL)for concurrency control. The 2PL method is preferred over other methods for concurrency control because of its simplicity and common usage. However, conventional concurrency control solution will function poorly when the data are memory resident. In this paper, we propose a new optimistic concurrency control protocol for a main memory database system. In our proposed protocol, transaction conflict information is used in validation phase to improve data conflict resolution decisions. Our experiments show that the proposed protocol performs better than 2PL in terms of throughput for main memory database system enshrinements.

• 전기의세계
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• v.31 no.5
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• pp.355-360
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• 1982

In numerical computation, it is desirable to access any row or column, the main diagonal, subarrays, of a matrix without any conflict for successful parallel processing. To meet this requirement special storage scheme is used for conflict-free access of necessary data. Interconnection network, which connects processing elements and processing element memory modules, is required to execute the necessary operations. In this paper we discuss the skewing method for conflict-free, access to various bit slices and single-stage interconnection networks.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.55 no.10
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• pp.446-451
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• 2006

In this paper, we propose an implementation of JPEG2000 codec on the ARM9 Processor which includes independent memory management facility. The codec and memory management facility together can control the encoding and the decoding process effectively within available memory area. Embedded appliances like cellular phones have very limited internal memory which can't be expanded easily. However, they should provide various applications and services using restricted memory resources. The proposed codec with memory management can provide image quality that is identical to the original image on embedded platform. The implemented codec has no memory conflict with other applications. It shows that the proposed codec can manage memory resources efficiently.

• KIISE Transactions on Computing Practices
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• v.23 no.8
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• pp.466-472
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• 2017

Hardware Transactional Memory (HTM) has greatly changed the parallel programming paradigm for transaction processing. Since Intel has recently proposed Transactional Synchronization Extension (TSX), a number of studies based on HTM have been conducted. However, the existing studies support conflict prediction for a single cause of the transaction processing and provide a standardized TSX environment for all workloads. To solve the problems, we propose an efficient hardware transactional memory scheme for processing transactions in multi-core in-memory environment. First, the proposed scheme determines whether to use Software Transactional Memory (STM) or the serial execution as a fallback path of HTM by using a prediction matrix to collect the information of previously executed transactions. Second, the proposed scheme performs efficient transaction processing according to the characteristic of a given workload by providing a retry policy based on machine learning algorithms. Finally, through the experimental performance evaluation using Stanford transactional applications for multi-processing (STAMP), the proposed scheme shows 10~20% better performance than the existing schemes.

• Korean Journal of Cognitive Science
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• v.18 no.2
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• pp.113-138
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• 2007

The effects of schema on accurate and false memories of items in a scene were investigated in two experiments: Recognition of items in a scene was tested immediately in Experiment 1 and three days later in Experiment 2. In both experiments, the following three variables were manipulated: Exposure time (250ms or 10000ms), picture mode (completed pictures or scrambled pictures), and manipulation mode (missing item or substituted item). Experiment 1 had yielded three important results: First, although accurate memory for presented items got increased when the exposure time was longer, false memory of the critical lures was not changed. Second, false memory of critical lures in the missing condition, where there was not any conflict between verbatim information and gist information, was higher than that of the substituted condition, where verbatim information of the item that replaced the lure was in conflict with the gist information. Third, accurate memory for atypical items in the substituted rendition, which had replaced the critical lures and in conflict with the schema, was higher than that in the missing condition. In Experiment 2, recognition test were administered 72 hours after the participants saw the picture. The three effects mentioned in Experiment 1 had disappeared in Experiment 2. The results of Experiment 2 might be due to the selective weakening of verbatim information compared to the persistence of the gist (or schematic) information. The results of Experiments 1 and 2 showed that false memory of critical lures is more persistent than the accurate memory of non-critical information. Theoretical implications of the results were considered in terms of the function of the verbatim and gist information.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.451-452
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• 2008

In this paper we describe a multi-module, multi-port memory design procedure that satisfies area and/or energy constraints. Our procedure uses ILP models to determine (a) the memory configuration with minimum area, given the energy bound, (b) the memory configuration with minimum energy, given the area bound. If we have a margin in time constraint, we break up conflict edges and expend the search space of ILP. This method effectively reduces area and power of the designed results.